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| author | Marc Zyngier <maz@kernel.org> | 2019-07-18 13:18:51 +0100 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2019-08-20 10:23:35 +0100 |
| commit | 4b049063e0bcbfd302f6bf867de9d55a965d622e (patch) | |
| tree | a9b5642bd1055b568e242114e138fc6667cc2ccc /Documentation/devicetree/bindings/interrupt-controller | |
| parent | 52085d3f2028d853f8d6ce7ead2f8a504f6077fa (diff) | |
dt-bindings: interrupt-controller: arm,gic-v3: Describe EPPI range support
Update the GICv3 binding to allow interrupts in the EPPI range.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/interrupt-controller')
| -rw-r--r-- | Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml b/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml index 98a3ecda8e07..1fe147daca4c 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml @@ -44,12 +44,13 @@ properties: be at least 4. The 1st cell is the interrupt type; 0 for SPI interrupts, 1 for PPI - interrupts, 2 for interrupts in the Extended SPI range. Other values - are reserved for future use. + interrupts, 2 for interrupts in the Extended SPI range, 3 for the + Extended PPI range. Other values are reserved for future use. The 2nd cell contains the interrupt number for the interrupt type. SPI interrupts are in the range [0-987]. PPI interrupts are in the range [0-15]. Extented SPI interrupts are in the range [0-1023]. + Extended PPI interrupts are in the range [0-127]. The 3rd cell is the flags, encoded as follows: bits[3:0] trigger type and level flags. |