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authorJesper Nilsson <jesper@jni.nu>2018-03-11 11:05:23 +0100
committerArnd Bergmann <arnd@arndb.de>2018-03-16 10:56:05 +0100
commitc690eddc2f3b44b24520f4a77cc3a4c9bde7d571 (patch)
treeb7ba2caa6ebb2e36a529f9bf7182c9e0a73d53c4 /Documentation/devicetree/bindings/interrupt-controller
parentbb9d812643d8a121df7d614a2b9c60193a92deb0 (diff)
CRIS: Drop support for the CRIS port
The port was added back in 2000 so it's no longer even a good source of inspiration for newer ports (if it ever was) The last SoC (ARTPEC-3) with a CRIS main CPU was launched in 2008. Coupled with time and working developer board hardware being in low supply, it's time to drop the port from Linux. So long and thanks for all the fish! Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'Documentation/devicetree/bindings/interrupt-controller')
-rw-r--r--Documentation/devicetree/bindings/interrupt-controller/axis,crisv32-intc.txt23
1 files changed, 0 insertions, 23 deletions
diff --git a/Documentation/devicetree/bindings/interrupt-controller/axis,crisv32-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/axis,crisv32-intc.txt
deleted file mode 100644
index e8b123b0a5e6..000000000000
--- a/Documentation/devicetree/bindings/interrupt-controller/axis,crisv32-intc.txt
+++ /dev/null
@@ -1,23 +0,0 @@
-* CRISv32 Interrupt Controller
-
-Interrupt controller for the CRISv32 SoCs.
-
-Main node required properties:
-
-- compatible : should be:
- "axis,crisv32-intc"
-- interrupt-controller : Identifies the node as an interrupt controller
-- #interrupt-cells : Specifies the number of cells needed to encode an
- interrupt source. The type shall be a <u32> and the value shall be 1.
-- reg: physical base address and size of the intc registers map.
-
-Example:
-
- intc: interrupt-controller {
- compatible = "axis,crisv32-intc";
- reg = <0xb001c000 0x1000>;
- interrupt-controller;
- #interrupt-cells = <1>;
- };
-
-