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| author | Arnd Bergmann <arnd@arndb.de> | 2016-04-26 13:41:51 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2016-04-26 13:41:51 +0200 |
| commit | 6945248f34b95330700f3d2632608457abaddb18 (patch) | |
| tree | f5725a60e53659d3fecab9d1ae72b1e8ea7682ef /Documentation/devicetree/bindings/interrupt-controller | |
| parent | 1fb75865d8b80b216a6f540b32f6cd1480f8c843 (diff) | |
| parent | 0767a5cb425374aafa89d33d6b1190a01d7f6b0e (diff) | |
Merge tag 'ox810se-arm-dt-v4.6-rc3' of https://github.com/superna9999/linux into next/dt
Merge "ARM: dts: Add OXNAS Platform Bindings" from Neil Armstrong:
* tag 'ox810se-arm-dt-v4.6-rc3' of https://github.com/superna9999/linux:
ARM: boot: dts: Add Western Digital My Book World Edition device tree
dt-bindings: Add Western Digital to vendor prefixes
dt-bindings: Add OXNAS bindings
ARM: boot: dts: Add Oxford Semiconductor OX810SE dtsi
dt-bindings: Add Oxford Semiconductor to vendor prefixes
dt-bindings: irq: arm,versatile-fpga: add compatible string for OX810SE SoC
Diffstat (limited to 'Documentation/devicetree/bindings/interrupt-controller')
| -rw-r--r-- | Documentation/devicetree/bindings/interrupt-controller/arm,versatile-fpga-irq.txt | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,versatile-fpga-irq.txt b/Documentation/devicetree/bindings/interrupt-controller/arm,versatile-fpga-irq.txt index c9cf605bb995..2a1d16bdf834 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/arm,versatile-fpga-irq.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/arm,versatile-fpga-irq.txt @@ -6,7 +6,7 @@ controllers are OR:ed together and fed to the CPU tile's IRQ input. Each instance can handle up to 32 interrupts. Required properties: -- compatible: "arm,versatile-fpga-irq" +- compatible: "arm,versatile-fpga-irq" or "oxsemi,ox810se-rps-irq" - interrupt-controller: Identifies the node as an interrupt controller - #interrupt-cells: The number of cells to define the interrupts. Must be 1 as the FPGA IRQ controller has no configuration options for interrupt |