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authorLinus Torvalds <torvalds@linux-foundation.org>2025-03-29 11:23:16 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2025-03-29 11:23:16 -0700
commit3b9ea5b5ed7e07c47932bbc40ef633de51b3752f (patch)
tree043a8a78ef71abbaf68e8cee73a430860612a812 /Documentation/devicetree/bindings/interrupt-controller
parent092e335082f22880207384ad736729c67d784665 (diff)
parent314655d41e650b3d72c60aa80a449e0ab22e2ffd (diff)
Merge tag 'devicetree-for-6.15' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree updates from Rob Herring: "DT core: - Fix ref counting errors in interrupt parsing code - Allow "nonposted-mmio" property per device and on non-Apple h/w - Use typed accessors in platform driver code - Fix mismatch between DT MAX_PHANDLE_ARGS and NR_FWNODE_REFERENCE_ARGS and increase the maximum number args - Rework of_resolve_phandles() to use __free() cleanup and fix ref count error - Use of_prop_cmp() in a few more places - Improve make_fit.py script error handling DT bindings: - Update DT property ordering rules for properties within groups (i.e. common suffix) - Update DT submitting-patches doc to cover sending .dts patches and SoC maintainer rules on being warning free against linux-next - Add ti,tps53681, ti,tps53681, Maxim max15301, max15303, and max20751 to trivial devices - Add Renesas RZ/V2H(P) and Allwinner H616 support to Arm Mali Bifrost GPU. Add Samsung exynos7870 support to Arm Mail Midgard. - Rework qcom,ebi2 and samsung,exynos4210-sram memory controller bindings to split child node properties. Fix the LAN9115 binding to use the child node schema so all properties are documented. - Convert nxp,lpc3220-mic and Altera ECC manager bindings to schema - Fix some issues with LVDS display panels causing validation warnings - Drop some obsolete parts of Xilinx bindings" * tag 'devicetree-for-6.15' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (48 commits) scripts/make_fit: Print DT name before libfdt errors dt-bindings: edac: altera: socfpga: Convert to YAML dt-bindings: pps: gpio: Correct indentation and style in DTS example media: dt-bindings: mediatek,vcodec-encoder: Drop assigned-clock properties of: address: Allow to specify nonposted-mmio per-device of: address: Expand nonposted-mmio to non-Apple Silicon platforms docs: dt-bindings: Specify ordering for properties within groups dt-bindings: gpu: arm,mali-midgard: add exynos7870-mali compatible of: Move of_prop_val_eq() next to the single user of/platform: Use typed accessors rather than of_get_property() dt-bindings: trivial-devices: Add Maxim max15301, max15303, and max20751 dt-bindings: fsi: ibm,p9-scom: Add "ibm,fsi2pib" compatible dt-bindings: memory-controllers: qcom,ebi2: Enforce child props dt-bindings: memory-controllers: samsung,exynos4210-srom: Enforce child props dt-bindings: display: mitsubishi,aa104xd12: Adjust allowed and required properties dt-bindings: display: mitsubishi,aa104xd12: Allow jeida-18 for data-mapping dt-bindings: interrupt-controller: Convert nxp,lpc3220-mic.txt to yaml format docs: process: maintainer-soc-clean-dts: linux-next is decisive docs: dt: submitting-patches: Document sending DTS patches of: Align macro MAX_PHANDLE_ARGS with NR_FWNODE_REFERENCE_ARGS ...
Diffstat (limited to 'Documentation/devicetree/bindings/interrupt-controller')
-rw-r--r--Documentation/devicetree/bindings/interrupt-controller/nxp,lpc3220-mic.txt58
-rw-r--r--Documentation/devicetree/bindings/interrupt-controller/nxp,lpc3220-mic.yaml68
2 files changed, 68 insertions, 58 deletions
diff --git a/Documentation/devicetree/bindings/interrupt-controller/nxp,lpc3220-mic.txt b/Documentation/devicetree/bindings/interrupt-controller/nxp,lpc3220-mic.txt
deleted file mode 100644
index 0bfb3ba55f4c..000000000000
--- a/Documentation/devicetree/bindings/interrupt-controller/nxp,lpc3220-mic.txt
+++ /dev/null
@@ -1,58 +0,0 @@
-* NXP LPC32xx MIC, SIC1 and SIC2 Interrupt Controllers
-
-Required properties:
-- compatible: "nxp,lpc3220-mic" or "nxp,lpc3220-sic".
-- reg: should contain IC registers location and length.
-- interrupt-controller: identifies the node as an interrupt controller.
-- #interrupt-cells: the number of cells to define an interrupt, should be 2.
- The first cell is the IRQ number, the second cell is used to specify
- one of the supported IRQ types:
- IRQ_TYPE_EDGE_RISING = low-to-high edge triggered,
- IRQ_TYPE_EDGE_FALLING = high-to-low edge triggered,
- IRQ_TYPE_LEVEL_HIGH = active high level-sensitive,
- IRQ_TYPE_LEVEL_LOW = active low level-sensitive.
- Reset value is IRQ_TYPE_LEVEL_LOW.
-
-Optional properties:
-- interrupts: empty for MIC interrupt controller, cascaded MIC
- hardware interrupts for SIC1 and SIC2
-
-Examples:
-
- /* LPC32xx MIC, SIC1 and SIC2 interrupt controllers */
- mic: interrupt-controller@40008000 {
- compatible = "nxp,lpc3220-mic";
- reg = <0x40008000 0x4000>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- sic1: interrupt-controller@4000c000 {
- compatible = "nxp,lpc3220-sic";
- reg = <0x4000c000 0x4000>;
- interrupt-controller;
- #interrupt-cells = <2>;
-
- interrupt-parent = <&mic>;
- interrupts = <0 IRQ_TYPE_LEVEL_LOW>,
- <30 IRQ_TYPE_LEVEL_LOW>;
- };
-
- sic2: interrupt-controller@40010000 {
- compatible = "nxp,lpc3220-sic";
- reg = <0x40010000 0x4000>;
- interrupt-controller;
- #interrupt-cells = <2>;
-
- interrupt-parent = <&mic>;
- interrupts = <1 IRQ_TYPE_LEVEL_LOW>,
- <31 IRQ_TYPE_LEVEL_LOW>;
- };
-
- /* ADC */
- adc@40048000 {
- compatible = "nxp,lpc3220-adc";
- reg = <0x40048000 0x1000>;
- interrupt-parent = <&sic1>;
- interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
- };
diff --git a/Documentation/devicetree/bindings/interrupt-controller/nxp,lpc3220-mic.yaml b/Documentation/devicetree/bindings/interrupt-controller/nxp,lpc3220-mic.yaml
new file mode 100644
index 000000000000..724c869e3c40
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/nxp,lpc3220-mic.yaml
@@ -0,0 +1,68 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/interrupt-controller/nxp,lpc3220-mic.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP LPC32xx MIC, SIC1 and SIC2 Interrupt Controllers
+
+maintainers:
+ - Vladimir Zapolskiy <vz@mleia.com>
+
+properties:
+ compatible:
+ enum:
+ - nxp,lpc3220-mic
+ - nxp,lpc3220-sic
+
+ reg:
+ maxItems: 1
+
+ interrupt-controller: true
+
+ '#interrupt-cells':
+ const: 2
+
+ interrupts:
+ items:
+ - description: Regular interrupt request
+ - description: Fast interrupt request
+
+required:
+ - compatible
+ - reg
+ - interrupt-controller
+ - '#interrupt-cells'
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: nxp,lpc3220-sic
+ then:
+ required:
+ - interrupts
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+
+ mic: interrupt-controller@40008000 {
+ compatible = "nxp,lpc3220-mic";
+ reg = <0x40008000 0x4000>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ interrupt-controller@4000c000 {
+ compatible = "nxp,lpc3220-sic";
+ reg = <0x4000c000 0x4000>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupt-parent = <&mic>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>,
+ <30 IRQ_TYPE_LEVEL_LOW>;
+ };