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authorDong Aisheng <aisheng.dong@nxp.com>2019-12-02 18:00:47 +0800
committerDong Aisheng <aisheng.dong@nxp.com>2019-12-02 18:00:47 +0800
commit028cc80de99b3196ac15580409e84574cfc79861 (patch)
tree3e306e09f44572b5fac558de2dc90f8840fc0b61 /Documentation/devicetree/bindings/media
parent06e92d2f26e3562206ff9cec4c408d54b8b187f3 (diff)
parent6e2908e6e75e9f7f3a297c70bf006694e95c4838 (diff)
Merge remote-tracking branch 'origin/capture/isi' into capture/next
* origin/capture/isi: (9 commits) staging: media: imx: add g_parm/s_parm for imx8 capture device staging: media: imx: enable ISI for imx8mn platform media: staging: imx: add V4L2 memory to memory driver for ISI of imx8qxp/qm media: staging: imx: add isi capture driver support for imx8qm/qxp media: staging: imx: add isi core driver support for imx8qm/qxp ...
Diffstat (limited to 'Documentation/devicetree/bindings/media')
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diff --git a/Documentation/devicetree/bindings/media/imx8-isi.txt b/Documentation/devicetree/bindings/media/imx8-isi.txt
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+NXP Image Sensor Interface
+========================
+
+The Image Sensor Interface (ISI) is used to obtain the image data for
+processing in its pipeline channels. Each pipeline processes the image
+line from a configured source and performs one or more functions that
+are configured by software, such as down scaling, color space conversion,
+de-interlacing, alpha insertion, cropping and rotation (horizontal and
+vertical). The processed image is stored into programmable memory locations.
+
+Required properties:
+- compatible: should be "fsl,imx8-isi", where SoC can be one of imx8qxp, imx8qm
+- reg: the register base and size for the device registers
+- interrupts: the ISI interrupt, high level active
+- clock-names: should be "per"
+- clocks: the ISI AXI clock
+- interface: specify ISI input, virtual channel and output,
+ <Input MIPI_VCx Output>
+ Input : 0-DC0, 1-DC1, 2-MIPI CSI0, 3-MIPI CSI1, 4-HDMI, 5-MEM
+ VCx : 0-VC0, 1-VC1, 2-VC2, 3-VC3, MIPI CSI only
+ Output: 0-DC0, 1-DC1, 2-MEM
+
+Example:
+ isi_0: isi@58100000 {
+ compatible = "fsl,imx8-isi";
+ reg = <0x58100000 0x10000>;
+ interrupts = <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-parent = <&gic>;
+ clocks = <&img_lpcg IMX_IMG_LPCG_PDMA0_CLK>;
+ clock-names = "per";
+ power-domains = <&pd IMX_SC_R_ISI_CH0>;
+ interface = <2 0 2>;
+ };