summaryrefslogtreecommitdiff
path: root/Documentation/devicetree/bindings/media
diff options
context:
space:
mode:
authorGuoniu.zhou <guoniu.zhou@nxp.com>2019-04-18 15:25:49 +0800
committerDong Aisheng <aisheng.dong@nxp.com>2019-11-25 16:01:59 +0800
commit4792d808dc79c5edf1afb06e197714f2680b2ffb (patch)
tree68e601cdfc2a90c3ed65ea447bfd2aa9c47a58e0 /Documentation/devicetree/bindings/media
parent219d54332a09e8d8741c1e1982f5eae56099de85 (diff)
media: dt-bindings: add bindings for i.MX8QXP/QM ISI driver
Add bindings documentation for i.MX8QXP/QM ISI drivers. Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Diffstat (limited to 'Documentation/devicetree/bindings/media')
-rw-r--r--Documentation/devicetree/bindings/media/imx8-isi.txt33
1 files changed, 33 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/media/imx8-isi.txt b/Documentation/devicetree/bindings/media/imx8-isi.txt
new file mode 100644
index 000000000000..7739121f0ca6
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/imx8-isi.txt
@@ -0,0 +1,33 @@
+NXP Image Sensor Interface
+========================
+
+The Image Sensor Interface (ISI) is used to obtain the image data for
+processing in its pipeline channels. Each pipeline processes the image
+line from a configured source and performs one or more functions that
+are configured by software, such as down scaling, color space conversion,
+de-interlacing, alpha insertion, cropping and rotation (horizontal and
+vertical). The processed image is stored into programmable memory locations.
+
+Required properties:
+- compatible: should be "fsl,imx8-isi", where SoC can be one of imx8qxp, imx8qm
+- reg: the register base and size for the device registers
+- interrupts: the ISI interrupt, high level active
+- clock-names: should be "per"
+- clocks: the ISI AXI clock
+- interface: specify ISI input, virtual channel and output,
+ <Input MIPI_VCx Output>
+ Input : 0-DC0, 1-DC1, 2-MIPI CSI0, 3-MIPI CSI1, 4-HDMI, 5-MEM
+ VCx : 0-VC0, 1-VC1, 2-VC2, 3-VC3, MIPI CSI only
+ Output: 0-DC0, 1-DC1, 2-MEM
+
+Example:
+ isi_0: isi@58100000 {
+ compatible = "fsl,imx8-isi";
+ reg = <0x58100000 0x10000>;
+ interrupts = <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-parent = <&gic>;
+ clocks = <&img_lpcg IMX_IMG_LPCG_PDMA0_CLK>;
+ clock-names = "per";
+ power-domains = <&pd IMX_SC_R_ISI_CH0>;
+ interface = <2 0 2>;
+ };