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authorDmitry Osipenko <digetx@gmail.com>2020-11-04 19:48:47 +0300
committerKrzysztof Kozlowski <krzk@kernel.org>2020-11-06 19:32:10 +0100
commit48126d7884ab56c2352ae328d5fd42c7d2d7b125 (patch)
treecd9a8204b6915e13d4ee9a8854312e9def2b057f /Documentation/devicetree/bindings/memory-controllers
parent6ec85c032aee0cde82b2c63a3e521132c97c4660 (diff)
dt-bindings: memory: tegra30: emc: Document OPP table and voltage regulator
Document new OPP table and voltage regulator properties which are needed for supporting dynamic voltage-frequency scaling of the memory controller. Some boards may have a fixed core voltage regulator, hence it's optional because frequency scaling still may be desired. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20201104164923.21238-12-digetx@gmail.com Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/memory-controllers')
-rw-r--r--Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-emc.yaml12
1 files changed, 12 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-emc.yaml b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-emc.yaml
index c243986db420..0a2e2c0d0fdd 100644
--- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-emc.yaml
+++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-emc.yaml
@@ -39,6 +39,15 @@ properties:
description:
Phandle of the Memory Controller node.
+ core-supply:
+ description:
+ Phandle of voltage regulator of the SoC "core" power domain.
+
+ operating-points-v2:
+ description:
+ Should contain freqs and voltages and opp-supported-hw property, which
+ is a bitfield indicating SoC speedo ID mask.
+
patternProperties:
"^emc-timings-[0-9]+$":
type: object
@@ -218,6 +227,7 @@ required:
- clocks
- nvidia,memory-controller
- "#interconnect-cells"
+ - operating-points-v2
additionalProperties: false
@@ -230,6 +240,8 @@ examples:
clocks = <&tegra_car 57>;
nvidia,memory-controller = <&mc>;
+ operating-points-v2 = <&dvfs_opp_table>;
+ core-supply = <&vdd_core>;
#interconnect-cells = <0>;