diff options
| author | Dong Aisheng <aisheng.dong@nxp.com> | 2021-11-30 15:00:20 +0800 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2021-11-30 15:00:20 +0800 |
| commit | a5238e24e0dde2d7fcf639d9816265cb4f93c310 (patch) | |
| tree | 0c52e518e35daf037af4657b9108e25665ea5dd7 /Documentation/devicetree/bindings/memory-controllers | |
| parent | a21e59ba908957b3203af12454c052c5a227ec15 (diff) | |
| parent | 9641b7b2e1e7eb1afbe652e56810ba87ad561771 (diff) | |
Merge branch 'edac/next' into next
* edac/next:
MLK-23333-3 EDAC: synopsys: enable interrupt again for imx8mpevk
MLK-23333-2 EDAC: synopsys: Add more useful output information for CE/UE
MLK-23333-1 dt: bindings: Document i.MX8MP DDRC in Synopsys documentation
MLK-23310-3 EDAC: synopsys: Add edac driver support for i.MX8MP
Diffstat (limited to 'Documentation/devicetree/bindings/memory-controllers')
| -rw-r--r-- | Documentation/devicetree/bindings/memory-controllers/synopsys,ddrc-ecc.yaml | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/memory-controllers/synopsys,ddrc-ecc.yaml b/Documentation/devicetree/bindings/memory-controllers/synopsys,ddrc-ecc.yaml index a24588474625..d4d5851cb981 100644 --- a/Documentation/devicetree/bindings/memory-controllers/synopsys,ddrc-ecc.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/synopsys,ddrc-ecc.yaml @@ -12,13 +12,13 @@ maintainers: - Michal Simek <michal.simek@xilinx.com> description: | - The ZynqMP DDR ECC controller has an optional ECC support in 64-bit and - 32-bit bus width configurations. + The ZynqMP and i.MX8MP DDR ECC controller has an optional ECC support in 64-bit + and 32-bit bus width configurations. The Zynq DDR ECC controller has an optional ECC support in half-bus width (16-bit) configuration. - These both ECC controllers correct single bit ECC errors and detect double bit + These all ECC controllers correct single bit ECC errors and detect double bit ECC errors. properties: @@ -26,6 +26,7 @@ properties: enum: - xlnx,zynq-ddrc-a05 - xlnx,zynqmp-ddrc-2.40a + - fsl,imx8mp-ddrc interrupts: maxItems: 1 |