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| author | Arnd Bergmann <arnd@arndb.de> | 2017-12-21 18:05:04 +0100 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2017-12-21 18:05:04 +0100 |
| commit | 62bf8ae8960590cd23b75b61397b94d415dc4e91 (patch) | |
| tree | 023a828ba3b9e6a3037ff0435998d00f9fe1528e /Documentation/devicetree/bindings/memory-controllers | |
| parent | bad19e0d0460564a067f901b6848c0cc0c403c52 (diff) | |
| parent | 83476bfaf6ac1cebf0cc5a3bdcf5031ef875cf42 (diff) | |
Merge tag 'tegra-for-4.16-memory' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
Pull "memory: tegra: Changes for v4.16-rc1" from Thierry Reding:
The Tegra memory controller driver will now instruct the SMMU driver to
create groups, which will make it easier for device drivers to share an
IOMMU domain between multiple devices.
Initial Tegra186 support is also added in a separate driver.
* tag 'tegra-for-4.16-memory' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
iommu/tegra-smmu: Fix return value check in tegra_smmu_group_get()
iommu/tegra: Allow devices to be grouped
memory: tegra: Create SMMU display groups
memory: tegra: Add Tegra186 support
dt-bindings: memory: Add Tegra186 support
dt-bindings: misc: Add Tegra186 MISC registers bindings
Diffstat (limited to 'Documentation/devicetree/bindings/memory-controllers')
| -rw-r--r-- | Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-mc.txt | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-mc.txt b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-mc.txt index 8dbe47013c2b..14968b048cd3 100644 --- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-mc.txt +++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-mc.txt @@ -12,6 +12,8 @@ Required properties: - clock-names: Must include the following entries: - mc: the module's clock input - interrupts: The interrupt outputs from the controller. + +Required properties for Tegra30, Tegra114, Tegra124, Tegra132 and Tegra210: - #iommu-cells: Should be 1. The single cell of the IOMMU specifier defines the SWGROUP of the master. |