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authorSowjanya Komatineni <skomatineni@nvidia.com>2019-05-13 22:03:55 -0700
committerMark Brown <broonie@kernel.org>2019-05-15 12:17:56 +0100
commit318dacbd049b447a5b45290b39f1c889b9cbde4d (patch)
treed9ae6433e75e125f0de28f19a850304064adfc95 /Documentation/devicetree/bindings/mfd
parent9b76ef39b7fbc2ddb0869725f9745a402d93cce5 (diff)
spi: tegra114: add support for TX and RX trimmers
Tegra SPI master controller has programmable trimmers to adjust the data with respect to the clock. These trimmers are programmed in TX_CLK_TAP_DELAY and RX_CLK_TAP_DELAY fields of COMMAND2 register. SPI TX trimmer is to adjust the outgoing data with respect to the outgoing clock and SPI RX trimmer is to adjust the loopback clock with respect to the incoming data from the slave device. These trimmers vary based on trace lengths of the platform design for each of the slaves on the SPI bus and optimal value programmed is from the platform validation across PVT. This patch adds support for configuring TX and RX clock delay trimmers through the device tree properties. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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