diff options
| author | Shawn Lin <shawn.lin@rock-chips.com> | 2021-03-16 15:18:21 +0800 |
|---|---|---|
| committer | Ulf Hansson <ulf.hansson@linaro.org> | 2021-03-30 11:42:05 +0200 |
| commit | dd12261e7fd9a3c7f6ddf76152764861ad4f0e12 (patch) | |
| tree | 4037b3ca56d29612fe21ee7561e4dc4edbc5c74c /Documentation/devicetree/bindings/mmc | |
| parent | 169162ca4781480ea5bb67b0610f3efbecaf3e66 (diff) | |
dt-bindings: mmc: sdhci-of-dwcmhsc: Add rockchip support
This patch adds rockchip support in sdhci-of-dwcmhsc.yaml
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Link: https://lore.kernel.org/r/1615879102-45919-2-git-send-email-shawn.lin@rock-chips.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/mmc')
| -rw-r--r-- | Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml index f99fb9fbb83b..e6c9a2f77cc7 100644 --- a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml @@ -16,6 +16,7 @@ allOf: properties: compatible: enum: + - rockchip,rk3568-dwcmshc - snps,dwcmshc-sdhci reg: @@ -31,12 +32,24 @@ properties: items: - description: core clock - description: bus clock for optional + - description: axi clock for rockchip specified + - description: block clock for rockchip specified + - description: timer clock for rockchip specified + clock-names: minItems: 1 items: - const: core - const: bus + - const: axi + - const: block + - const: timer + + rockchip,txclk-tapnum: + description: Specify the number of delay for tx sampling. + $ref: /schemas/types.yaml#/definitions/uint8 + required: - compatible @@ -49,6 +62,17 @@ unevaluatedProperties: false examples: - | + mmc@fe310000 { + compatible = "rockchip,rk3568-dwcmshc"; + reg = <0xfe310000 0x10000>; + interrupts = <0 25 0x4>; + clocks = <&cru 17>, <&cru 18>, <&cru 19>, <&cru 20>, <&cru 21>; + clock-names = "core", "bus", "axi", "block", "timer"; + bus-width = <8>; + #address-cells = <1>; + #size-cells = <0>; + }; + - | mmc@aa0000 { compatible = "snps,dwcmshc-sdhci"; reg = <0xaa000 0x1000>; |