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| author | Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> | 2020-11-24 12:18:38 +0800 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2021-01-13 11:37:03 +0000 |
| commit | b436fb7d29bfa48ff5e00cbf413609c7a6d4d81e (patch) | |
| tree | 8652413cc4a84342ee2fa81ffeedeb65008cd3e0 /Documentation/devicetree/bindings/mtd | |
| parent | ad2775dc3fc5d30dd51984ccbaa736cc7ea9caca (diff) | |
spi: cadence-quadspi: Add multi-chipselect support for Intel LGM SoC
Add multiple chipselect support for Intel LGM SoCs,
currently QSPI-NOR and QSPI-NAND supported.
Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
Link: https://lore.kernel.org/r/20201124041840.31066-4-vadivel.muruganx.ramuthevar@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/mtd')
0 files changed, 0 insertions, 0 deletions