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authorBrian Norris <computersforpeace@gmail.com>2018-07-27 11:33:13 -0700
committerBoris Brezillon <boris.brezillon@bootlin.com>2018-08-01 09:27:38 +0200
commitbb276262e88dae52cc717bb636b7468f66bb234e (patch)
tree6f77519353c02b2fdda3ccad09f9fab557c6558f /Documentation/devicetree/bindings/mtd
parent3938c0d4cf60477ec776c9a7751226b06bb3c3c0 (diff)
mtd: spi-nor: only apply reset hacks to broken hardware
Commit 59b356ffd0b0 ("mtd: m25p80: restore the status of SPI flash when exiting") is the latest from a long history of attempts to add reboot handling to handle stateful addressing modes on SPI flash. Some prior mostly-related discussions: http://lists.infradead.org/pipermail/linux-mtd/2013-March/046343.html [PATCH 1/3] mtd: m25p80: utilize dedicated 4-byte addressing commands http://lists.infradead.org/pipermail/barebox/2014-September/020682.html [RFC] MTD m25p80 3-byte addressing and boot problem http://lists.infradead.org/pipermail/linux-mtd/2015-February/057683.html [PATCH 2/2] m25p80: if supported put chip to deep power down if not used Previously, attempts to add reboot-time software reset handling were rejected, but the latest attempt was not. Quick summary of the problem: Some systems (e.g., boot ROM or bootloader) assume that they can read initial boot code from their SPI flash using 3-byte addressing. If the flash is left in 4-byte mode after reset, these systems won't boot. The above patch provided a shutdown/remove hook to attempt to reset the addressing mode before we reboot. Notably, this patch misses out on huge classes of unexpected reboots (e.g., crashes, watchdog resets). Unfortunately, it is essentially impossible to solve this problem 100%: if your system doesn't know how to reset the SPI flash to power-on defaults at initialization time, no amount of software can really rescue you -- there will always be a chance of some unexpected reset that leaves your flash in an addressing mode that your boot sequence didn't expect. While it is not directly harmful to perform hacks like the aforementioned commit on all 4-byte addressing flash, a properly-designed system should not need the hack -- and in fact, providing this hack may mask the fact that a given system is indeed broken. So this patch attempts to apply this unsound hack more narrowly, providing a strong suggestion to developers and system designers that this is truly a hack. With luck, system designers can catch their errors early on in their development cycle, rather than applying this hack long term. But apparently enough systems are out in the wild that we still have to provide this hack. Document a new device tree property to denote systems that do not have a proper hardware (or software) reset mechanism, and apply the hack (with a loud warning) only in this case. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Diffstat (limited to 'Documentation/devicetree/bindings/mtd')
-rw-r--r--Documentation/devicetree/bindings/mtd/jedec,spi-nor.txt9
1 files changed, 9 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.txt b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.txt
index 956bb046e599..f03be904d3c2 100644
--- a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.txt
+++ b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.txt
@@ -69,6 +69,15 @@ Optional properties:
all chips and support for it can not be detected at runtime.
Refer to your chips' datasheet to check if this is supported
by your chip.
+- broken-flash-reset : Some flash devices utilize stateful addressing modes
+ (e.g., for 32-bit addressing) which need to be managed
+ carefully by a system. Because these sorts of flash don't
+ have a standardized software reset command, and because some
+ systems don't toggle the flash RESET# pin upon system reset
+ (if the pin even exists at all), there are systems which
+ cannot reboot properly if the flash is left in the "wrong"
+ state. This boolean flag can be used on such systems, to
+ denote the absence of a reliable reset mechanism.
Example: