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authorDong Aisheng <aisheng.dong@nxp.com>2021-11-30 14:59:45 +0800
committerDong Aisheng <aisheng.dong@nxp.com>2021-11-30 14:59:45 +0800
commite700345aa611be2d648bde4225d3105d5d6e45a4 (patch)
treee40b174aeecdafbc649177316d631d67a1328f1c /Documentation/devicetree/bindings/net
parent4bc08d1921a4a5ccdafa61a1e560f47467ff1411 (diff)
parent3aa3c1d329f96623effce6a08c859353575a3785 (diff)
Merge remote-tracking branch 'origin/net/pfe' into net/next
* origin/net/pfe: (64 commits) staging: fsl_ppfe: deal with upstream API change of of_get_mac_address() staging: fsl_ppfe/eth: PFE firmware load enhancements staging: fsl_ppfe/eth: Ethtool stats correction for IEEE_rx_drop counter staging: fsl_ppfe/eth: LF-27 enabling PFE firmware load from FDT staging: fsl_ppfe/eth: Avoiding return value overwrite ...
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+=============================================================================
+NXP Programmable Packet Forwarding Engine Device Bindings
+
+CONTENTS
+ - PFE Node
+ - Ethernet Node
+
+=============================================================================
+PFE Node
+
+DESCRIPTION
+
+PFE Node has all the properties associated with Packet Forwarding Engine block.
+
+PROPERTIES
+
+- compatible
+ Usage: required
+ Value type: <stringlist>
+ Definition: Must include "fsl,pfe"
+
+- reg
+ Usage: required
+ Value type: <prop-encoded-array>
+ Definition: A standard property.
+ Specifies the offset of the following registers:
+ - PFE configuration registers
+ - DDR memory used by PFE
+
+- fsl,pfe-num-interfaces
+ Usage: required
+ Value type: <u32>
+ Definition: Must be present. Value can be either one or two.
+
+- interrupts
+ Usage: required
+ Value type: <prop-encoded-array>
+ Definition: Three interrupts are specified in this property.
+ - HIF interrupt
+ - HIF NO COPY interrupt
+ - Wake On LAN interrupt
+
+- interrupt-names
+ Usage: required
+ Value type: <stringlist>
+ Definition: Following strings are defined for the 3 interrupts.
+ "pfe_hif" - HIF interrupt
+ "pfe_hif_nocpy" - HIF NO COPY interrupt
+ "pfe_wol" - Wake On LAN interrupt
+
+- memory-region
+ Usage: required
+ Value type: <phandle>
+ Definition: phandle to a node describing reserved memory used by pfe.
+ Refer:- Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
+
+- fsl,pfe-scfg
+ Usage: required
+ Value type: <phandle>
+ Definition: phandle for scfg.
+
+- fsl,rcpm-wakeup
+ Usage: required
+ Value type: <phandle>
+ Definition: phandle for rcpm.
+
+- clocks
+ Usage: required
+ Value type: <phandle>
+ Definition: phandle for clockgen.
+
+- clock-names
+ Usage: required
+ Value type: <string>
+ Definition: phandle for clock name.
+
+EXAMPLE
+
+pfe: pfe@04000000 {
+ compatible = "fsl,pfe";
+ reg = <0x0 0x04000000 0x0 0xc00000>, /* AXI 16M */
+ <0x0 0x83400000 0x0 0xc00000>; /* PFE DDR 12M */
+ reg-names = "pfe", "pfe-ddr";
+ fsl,pfe-num-interfaces = <0x2>;
+ interrupts = <0 172 0x4>, /* HIF interrupt */
+ <0 173 0x4>, /*HIF_NOCPY interrupt */
+ <0 174 0x4>; /* WoL interrupt */
+ interrupt-names = "pfe_hif", "pfe_hif_nocpy", "pfe_wol";
+ memory-region = <&pfe_reserved>;
+ fsl,pfe-scfg = <&scfg 0>;
+ fsl,rcpm-wakeup = <&rcpm 0xf0000020>;
+ clocks = <&clockgen 4 0>;
+ clock-names = "pfe";
+
+ status = "okay";
+ pfe_mac0: ethernet@0 {
+ };
+
+ pfe_mac1: ethernet@1 {
+ };
+};
+
+=============================================================================
+Ethernet Node
+
+DESCRIPTION
+
+Ethernet Node has all the properties associated with PFE used by platforms to
+connect to PHY:
+
+PROPERTIES
+
+- compatible
+ Usage: required
+ Value type: <stringlist>
+ Definition: Must include "fsl,pfe-gemac-port"
+
+- reg
+ Usage: required
+ Value type: <prop-encoded-array>
+ Definition: A standard property.
+ Specifies the gemacid of the interface.
+
+- fsl,gemac-bus-id
+ Usage: required
+ Value type: <u32>
+ Definition: Must be present. Value should be the id of the bus
+ connected to gemac.
+
+- fsl,gemac-phy-id (deprecated binding)
+ Usage: required
+ Value type: <u32>
+ Definition: This binding shouldn't be used with new platforms.
+ Must be present. Value should be the id of the phy
+ connected to gemac.
+
+- fsl,mdio-mux-val
+ Usage: required
+ Value type: <u32>
+ Definition: Must be present. Value can be either 0 or 2 or 3.
+ This value is used to configure the mux to enable mdio.
+
+- phy-mode
+ Usage: required
+ Value type: <string>
+ Definition: Must include "sgmii"
+
+- fsl,pfe-phy-if-flags (deprecated binding)
+ Usage: required
+ Value type: <u32>
+ Definition: This binding shouldn't be used with new platforms.
+ Must be present. Value should be 0 by default.
+ If there is not phy connected, this need to be 1.
+
+- phy-handle
+ Usage: optional
+ Value type: <phandle>
+ Definition: phandle to the PHY device connected to this device.
+
+- mdio : A required subnode which specifies the mdio bus in the PFE and used as
+a container for phy nodes according to ../phy.txt.
+
+EXAMPLE
+
+ethernet@0 {
+ compatible = "fsl,pfe-gemac-port";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0>; /* GEM_ID */
+ fsl,gemac-bus-id = <0x0>; /* BUS_ID */
+ fsl,mdio-mux-val = <0x0>;
+ phy-mode = "sgmii";
+ phy-handle = <&sgmii_phy1>;
+};
+
+
+ethernet@1 {
+ compatible = "fsl,pfe-gemac-port";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x1>; /* GEM_ID */
+ fsl,gemac-bus-id = <0x1>; /* BUS_ID */
+ fsl,mdio-mux-val = <0x0>;
+ phy-mode = "sgmii";
+ phy-handle = <&sgmii_phy2>;
+};
+
+mdio@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ sgmii_phy1: ethernet-phy@2 {
+ reg = <0x2>;
+ };
+
+ sgmii_phy2: ethernet-phy@1 {
+ reg = <0x1>;
+ };
+};