diff options
| author | Niklas Cassel <niklas.cassel@linaro.org> | 2019-07-25 12:41:32 +0200 |
|---|---|---|
| committer | Viresh Kumar <viresh.kumar@linaro.org> | 2019-07-26 13:28:59 +0530 |
| commit | a409906003a2b5418e6e60ac2524948ea80819f2 (patch) | |
| tree | 51d725f7d31ca732d5a91e23f3dd63a3e5cf1965 /Documentation/devicetree/bindings/opp | |
| parent | 8cfda0df3a3020454848f55ed23a781169770c99 (diff) | |
dt-bindings: opp: qcom-nvmem: Make speedbin related properties optional
Not all Qualcomm platforms need to care about the speedbin efuse,
nor the value blown into the speedbin efuse.
Therefore, make the nvmem-cells and opp-supported-hw properties
optional.
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Reviewed-by: Ilia Lin <ilia.lin@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/opp')
| -rw-r--r-- | Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt b/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt index 198441e80ba8..c5ea8b90e35d 100644 --- a/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt +++ b/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt @@ -20,6 +20,10 @@ In 'cpus' nodes: In 'operating-points-v2' table: - compatible: Should be - 'operating-points-v2-kryo-cpu' for apq8096 and msm8996. + +Optional properties: +-------------------- +In 'operating-points-v2' table: - nvmem-cells: A phandle pointing to a nvmem-cells node representing the efuse registers that has information about the speedbin that is used to select the right frequency/voltage |