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| author | Richard Zhu <hongxing.zhu@nxp.com> | 2021-02-05 15:45:25 +0800 |
|---|---|---|
| committer | Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com> | 2021-04-27 10:41:53 +0000 |
| commit | f4e58971d1fd3de12ac732c74441c9829b19adea (patch) | |
| tree | 129f678986ed9a65ba745be158f314120772a4b8 /Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt | |
| parent | fc9f8cf465e5551d9ab09262b6b3cf71ee440a89 (diff) | |
MLK-25282-2 clk: imx8mp: remove the pcie phy clock
In the i.MX8MP PCIe design, the PCIe PHY REF clock comes from external
OSC or internal system PLL. It is configured in the IOMUX_GPR14 register
directly, and can't be contolled by CCM at all.
Remove it from clock driver to clean up codes.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Jason Liu <jason.hui.liu@nxp.com>
(cherry picked from commit 631360d6ba454aa9180325d73c12523a45946a51)
(cherry picked from commit 24e3536f4fdaf173f5c9009619df15b44dd5d7e9)
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Diffstat (limited to 'Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt')
0 files changed, 0 insertions, 0 deletions