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| author | Thierry Reding <treding@nvidia.com> | 2016-02-09 15:52:33 +0100 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2016-03-08 15:42:56 -0600 |
| commit | e32faa303f7f63bad8f9f04267878d61e0f7e0b5 (patch) | |
| tree | 61ca8fb5c0001b9d624b71c9271932a3bf656355 /Documentation/devicetree/bindings/pci | |
| parent | 56e75e2a15d0b28261503d415eb56bb4c2b92be5 (diff) | |
PCI: tegra: Remove misleading PHYS_OFFSET
BARs are disabled when the size register is 0, so it's misleading to write
a base address into the start register.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'Documentation/devicetree/bindings/pci')
0 files changed, 0 insertions, 0 deletions