summaryrefslogtreecommitdiff
path: root/Documentation/devicetree/bindings/pci
diff options
context:
space:
mode:
authorRichard Zhu <hongxing.zhu@nxp.com>2019-01-25 17:25:21 +0800
committerDong Aisheng <aisheng.dong@nxp.com>2021-11-02 17:05:21 +0800
commit890f821ac38f7d656b9f7ee0142d395d43d5c4b7 (patch)
treeb3378b8b38825b0023724bc77f80e14bc7ec5c7c /Documentation/devicetree/bindings/pci
parentef2c6b3282543f5e75d3d794771c1ed7ef99e6e9 (diff)
PCI: imx: enable imx8qm/qxp pcie support
Enable the imx8qm/qxp pcie support. Verified on the imx8qxp mek board. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Diffstat (limited to 'Documentation/devicetree/bindings/pci')
-rw-r--r--Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml11
1 files changed, 11 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
index acea1cd444fd..de00aec17ce8 100644
--- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
@@ -25,6 +25,8 @@ properties:
- fsl,imx6qp-pcie
- fsl,imx7d-pcie
- fsl,imx8mq-pcie
+ - fsl,imx8qm-pcie
+ - fsl,imx8qxp-pcie
reg:
items:
@@ -148,6 +150,15 @@ properties:
the three PCIe PHY powers. This regulator can be supplied by both
1.8v and 3.3v voltage supplies (optional required).
+ hsio-cfg:
+ description: hsio configuration mode when the pcie node is supported.
+ mode 1: pciea 2 lanes and one sata ahci port.
+ mode 2: pciea 1 lane, pcieb 1 lane and one sata ahci port.
+ mode 3: pciea 2 lanes, pcieb 1 lane.
+
+ local-addr:
+ description: the local address used in hsio module.
+
required:
- compatible
- reg