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authorAnson Huang <Anson.Huang@nxp.com>2020-08-05 14:36:27 +0800
committerRob Herring <robh@kernel.org>2020-08-17 15:42:01 -0600
commitfd0ae78d04f3a64975df8ea08fbed816d3e0c2fe (patch)
tree2bf6c4f8290424152df5114efcdeac5480624d8b /Documentation/devicetree/bindings/perf
parentf83febb44b42cf55e4f0cc9853f87801a82770b2 (diff)
dt-bindings: perf: Convert i.MX DDR to json-schema
Convert the i.MX DDR perf binding to DT schema format using json-schema. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Link: https://lore.kernel.org/r/1596609387-23542-1-git-send-email-Anson.Huang@nxp.com Signed-off-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/perf')
-rw-r--r--Documentation/devicetree/bindings/perf/fsl-imx-ddr.txt22
-rw-r--r--Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml41
2 files changed, 41 insertions, 22 deletions
diff --git a/Documentation/devicetree/bindings/perf/fsl-imx-ddr.txt b/Documentation/devicetree/bindings/perf/fsl-imx-ddr.txt
deleted file mode 100644
index 7822a806ea0a..000000000000
--- a/Documentation/devicetree/bindings/perf/fsl-imx-ddr.txt
+++ /dev/null
@@ -1,22 +0,0 @@
-* Freescale(NXP) IMX8 DDR performance monitor
-
-Required properties:
-
-- compatible: should be one of:
- "fsl,imx8-ddr-pmu"
- "fsl,imx8m-ddr-pmu"
- "fsl,imx8mp-ddr-pmu"
-
-- reg: physical address and size
-
-- interrupts: single interrupt
- generated by the control block
-
-Example:
-
- ddr-pmu@5c020000 {
- compatible = "fsl,imx8-ddr-pmu";
- reg = <0x5c020000 0x10000>;
- interrupt-parent = <&gic>;
- interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
- };
diff --git a/Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml b/Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml
new file mode 100644
index 000000000000..9ed8f44adabe
--- /dev/null
+++ b/Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml
@@ -0,0 +1,41 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/perf/fsl-imx-ddr.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale(NXP) IMX8 DDR performance monitor
+
+maintainers:
+ - Frank Li <frank.li@nxp.com>
+
+properties:
+ compatible:
+ enum:
+ - fsl,imx8-ddr-pmu
+ - fsl,imx8m-ddr-pmu
+ - fsl,imx8mp-ddr-pmu
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ ddr-pmu@5c020000 {
+ compatible = "fsl,imx8-ddr-pmu";
+ reg = <0x5c020000 0x10000>;
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
+ };