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| author | Olof Johansson <olof@lixom.net> | 2013-01-24 07:49:49 -0800 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2013-01-24 07:49:49 -0800 |
| commit | 60fd8e35e32087eed200bea99be037b5f75a016e (patch) | |
| tree | 64f6672dc891dde9c5b6a0e608a3acb8a056b967 /Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt | |
| parent | 4ad3041d3b76632c02b50aa384a8f21d7d15bac0 (diff) | |
| parent | 8461c2f6fdd3ef0b26f931d561435df8cae2a9a5 (diff) | |
Merge tag 'at91-fixes' of git://github.com/at91linux/linux-at91 into fixes
From Nicolas Ferre:
Here are fixes for AT91 that are mainly related to device tree.
One RM9200 setup option is the only C code change.
Some documentation changes can clarify the pinctrl use.
Then, some defconfig modifications are allowing the affected platforms
to boot.
* tag 'at91-fixes' of git://github.com/at91linux/linux-at91:
ARM: at91/dts: correct comment in at91sam9x5.dtsi for mii
ARM: at91/at91_dt_defconfig: add at91sam9n12 SoC to DT defconfig
ARM: at91/at91_dt_defconfig: remove memory specification to cmdline
ARM: at91/dts: add macb mii pinctrl config for kizbox
ARM: at91: rm9200: remake the BGA as default version
ARM: at91: fix gpios on i2c-gpio for RM9200 DT
ARM: at91/at91sam9x5 DTS: add SCK USART pins
ARM: at91/at91sam9x5 DTS: correct wrong PIO BANK values on u(s)arts
ARM: at91/at91-pinctrl documentation: fix typo and add some details
Diffstat (limited to 'Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt')
| -rw-r--r-- | Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt index 3a268127b054..bc50899e0c81 100644 --- a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt @@ -81,7 +81,8 @@ PA31 TXD4 Required properties for pin configuration node: - atmel,pins: 4 integers array, represents a group of pins mux and config setting. The format is atmel,pins = <PIN_BANK PIN_BANK_NUM PERIPH CONFIG>. - The PERIPH 0 means gpio. + The PERIPH 0 means gpio, PERIPH 1 is periph A, PERIPH 2 is periph B... + PIN_BANK 0 is pioA, PIN_BANK 1 is pioB... Bits used for CONFIG: PULL_UP (1 << 0): indicate this pin need a pull up. @@ -126,7 +127,7 @@ pinctrl@fffff400 { pinctrl_dbgu: dbgu-0 { atmel,pins = <1 14 0x1 0x0 /* PB14 periph A */ - 1 15 0x1 0x1>; /* PB15 periph with pullup */ + 1 15 0x1 0x1>; /* PB15 periph A with pullup */ }; }; }; |