diff options
| author | Hsin-Yi Wang <hsinyi@chromium.org> | 2021-01-29 18:12:06 +0800 |
|---|---|---|
| committer | Matthias Brugger <matthias.bgg@gmail.com> | 2021-01-31 13:02:55 +0100 |
| commit | ebfe73f7079a9ef5e6487ae8dfe48c43787118e8 (patch) | |
| tree | 84d60c2c479a34c88b4ce4b314f63a01c50c79d2 /Documentation/devicetree/bindings/power/mediatek,power-controller.yaml | |
| parent | 1570db1da9f57dfbe5dfa3010233c98947497466 (diff) | |
dt-bindings: power: Add domain regulator supply
Some power domains (eg. mfg) needs to turn on power supply before power
on.
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20210129101208.2625249-2-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Diffstat (limited to 'Documentation/devicetree/bindings/power/mediatek,power-controller.yaml')
| -rw-r--r-- | Documentation/devicetree/bindings/power/mediatek,power-controller.yaml | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml index 52e77315c163..f234a756c193 100644 --- a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml +++ b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml @@ -84,6 +84,9 @@ patternProperties: be specified by order, adding first the BASIC clocks followed by the SUSBSYS clocks. + domain-supply: + description: domain regulator supply. + mediatek,infracfg: $ref: /schemas/types.yaml#/definitions/phandle description: phandle to the device containing the INFRACFG register range. @@ -132,6 +135,9 @@ patternProperties: be specified by order, adding first the BASIC clocks followed by the SUSBSYS clocks. + domain-supply: + description: domain regulator supply. + mediatek,infracfg: $ref: /schemas/types.yaml#/definitions/phandle description: phandle to the device containing the INFRACFG register range. @@ -180,6 +186,9 @@ patternProperties: be specified by order, adding first the BASIC clocks followed by the SUSBSYS clocks. + domain-supply: + description: domain regulator supply. + mediatek,infracfg: $ref: /schemas/types.yaml#/definitions/phandle description: phandle to the device containing the INFRACFG register range. |