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authorTakashi Iwai <tiwai@suse.de>2019-02-08 14:20:32 +0100
committerTakashi Iwai <tiwai@suse.de>2019-02-08 14:20:32 +0100
commitd02cac152c97dffcb0cdd91e09b54fd6e2cca63d (patch)
tree68e4c6bd842703009f3edbf8f0e0e9326e4b2fad /Documentation/devicetree/bindings/reset/uniphier-reset.txt
parent36e4617c01153757cde9e5fcd375a75a8f8425c3 (diff)
parenta50e32694fbcdbf55875095258b9398e2eabd71f (diff)
Merge tag 'asoc-v5.1' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-next
ASoC: Updates for v5.1 Lots and lots of new drivers so far, a highlight being the MediaTek BTCVSD which is a driver for a Bluetooth radio chip - the first such driver we've had upstream. Hopefully we will soon also see a baseband with an upstream driver! - Support for only powering up channels that are actively being used. - Quite a few improvements to simplify the generic card drivers, especially the merge of the SCU cards into the main generic drivers. - Lots of fixes for probing on Intel systems, trying to rationalize things to look more standard from a framework point of view. - New drivers for Asahi Kasei Microdevices AK4497, Cirrus Logic CS4341, Google ChromeOS embedded controllers, Ingenic JZ4725B, MediaTek BTCVSD, MT8183 and MT6358, NXP MICFIL, Rockchip RK3328, Spreadtrum DMA controllers, Qualcomm WCD9335, Xilinx S/PDIF and PCM formatters.
Diffstat (limited to 'Documentation/devicetree/bindings/reset/uniphier-reset.txt')
-rw-r--r--Documentation/devicetree/bindings/reset/uniphier-reset.txt25
1 files changed, 14 insertions, 11 deletions
diff --git a/Documentation/devicetree/bindings/reset/uniphier-reset.txt b/Documentation/devicetree/bindings/reset/uniphier-reset.txt
index 101743dda223..ea005177d20a 100644
--- a/Documentation/devicetree/bindings/reset/uniphier-reset.txt
+++ b/Documentation/devicetree/bindings/reset/uniphier-reset.txt
@@ -120,27 +120,30 @@ Example:
};
-USB3 core reset
----------------
+Peripheral core reset in glue layer
+-----------------------------------
-USB3 core reset belongs to USB3 glue layer. Before using the core reset,
-it is necessary to control the clocks and resets to enable this layer.
-These clocks and resets should be described in each property.
+Some peripheral core reset belongs to its own glue layer. Before using
+this core reset, it is necessary to control the clocks and resets to enable
+this layer. These clocks and resets should be described in each property.
Required properties:
- compatible: Should be
- "socionext,uniphier-pro4-usb3-reset" - for Pro4 SoC
- "socionext,uniphier-pxs2-usb3-reset" - for PXs2 SoC
- "socionext,uniphier-ld20-usb3-reset" - for LD20 SoC
- "socionext,uniphier-pxs3-usb3-reset" - for PXs3 SoC
+ "socionext,uniphier-pro4-usb3-reset" - for Pro4 SoC USB3
+ "socionext,uniphier-pxs2-usb3-reset" - for PXs2 SoC USB3
+ "socionext,uniphier-ld20-usb3-reset" - for LD20 SoC USB3
+ "socionext,uniphier-pxs3-usb3-reset" - for PXs3 SoC USB3
+ "socionext,uniphier-pro4-ahci-reset" - for Pro4 SoC AHCI
+ "socionext,uniphier-pxs2-ahci-reset" - for PXs2 SoC AHCI
+ "socionext,uniphier-pxs3-ahci-reset" - for PXs3 SoC AHCI
- #reset-cells: Should be 1.
- reg: Specifies offset and length of the register set for the device.
-- clocks: A list of phandles to the clock gate for USB3 glue layer.
+- clocks: A list of phandles to the clock gate for the glue layer.
According to the clock-names, appropriate clocks are required.
- clock-names: Should contain
"gio", "link" - for Pro4 SoC
"link" - for others
-- resets: A list of phandles to the reset control for USB3 glue layer.
+- resets: A list of phandles to the reset control for the glue layer.
According to the reset-names, appropriate resets are required.
- reset-names: Should contain
"gio", "link" - for Pro4 SoC