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authorAisheng Dong <aisheng.dong@nxp.com>2018-12-17 15:00:51 +0000
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2018-12-19 08:24:36 +0100
commit9d84d3e6bd6871a0c410fc1c0571fa025236bf7e (patch)
tree0903dfd18f13a69690bb9e2b47c5b7326c1b0b7c /Documentation/devicetree/bindings/serial
parent260683137ab5276113fc322fdbbc578024185fee (diff)
dt-bindings: serial: lpuart: add imx8qxp compatible string
Add imx8qxp compatible string Cc: Mark Rutland <mark.rutland@arm.com> Cc: linux-serial@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'Documentation/devicetree/bindings/serial')
-rw-r--r--Documentation/devicetree/bindings/serial/fsl-lpuart.txt2
1 files changed, 2 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/serial/fsl-lpuart.txt b/Documentation/devicetree/bindings/serial/fsl-lpuart.txt
index 6bd3f2e93d61..21483ba820bc 100644
--- a/Documentation/devicetree/bindings/serial/fsl-lpuart.txt
+++ b/Documentation/devicetree/bindings/serial/fsl-lpuart.txt
@@ -8,6 +8,8 @@ Required properties:
on LS1021A SoC with 32-bit big-endian register organization
- "fsl,imx7ulp-lpuart" for lpuart compatible with the one integrated
on i.MX7ULP SoC with 32-bit little-endian register organization
+ - "fsl,imx8qxp-lpuart" for lpuart compatible with the one integrated
+ on i.MX8QXP SoC with 32-bit little-endian register organization
- reg : Address and length of the register set for the device
- interrupts : Should contain uart interrupt
- clocks : phandle + clock specifier pairs, one for each entry in clock-names