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authorThomas Gleixner <tglx@linutronix.de>2013-07-12 17:10:30 +0200
committerThomas Gleixner <tglx@linutronix.de>2013-07-12 17:10:30 +0200
commitb0ec636c93ddd77235bf0f023a8a95d78cb6cafe (patch)
tree0aec5825d51087da56c1d9bf5a3ec60316475ce1 /Documentation/devicetree/bindings/timer
parenta272dcca1802a7e265a56e60b0d0a6715b0a8ac2 (diff)
parentc1b40e447af8695666d4c11cfec4a7407e6a124d (diff)
Merge branch 'timers/clockevents' of git://git.linaro.org/people/dlezcano/clockevents into timers/urgent
* New clocksource drivers for ARM SoCs to share
Diffstat (limited to 'Documentation/devicetree/bindings/timer')
-rw-r--r--Documentation/devicetree/bindings/timer/marvell,orion-timer.txt17
1 files changed, 17 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/timer/marvell,orion-timer.txt b/Documentation/devicetree/bindings/timer/marvell,orion-timer.txt
new file mode 100644
index 000000000000..62bb8260cf6a
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/marvell,orion-timer.txt
@@ -0,0 +1,17 @@
+Marvell Orion SoC timer
+
+Required properties:
+- compatible: shall be "marvell,orion-timer"
+- reg: base address of the timer register starting with TIMERS CONTROL register
+- interrupt-parent: phandle of the bridge interrupt controller
+- interrupts: should contain the interrupts for Timer0 and Timer1
+- clocks: phandle of timer reference clock (tclk)
+
+Example:
+ timer: timer {
+ compatible = "marvell,orion-timer";
+ reg = <0x20300 0x20>;
+ interrupt-parent = <&bridge_intc>;
+ interrupts = <1>, <2>;
+ clocks = <&core_clk 0>;
+ };