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authorMartin Blumenstingl <martin.blumenstingl@googlemail.com>2018-10-28 13:35:13 +0100
committerKevin Hilman <khilman@baylibre.com>2018-11-14 17:19:56 -0800
commite55b892e1848e220f5248583b99bdcde63fe8f05 (patch)
treea4a5bf03b21a86cc9242a4cfbc4bd5542be39993 /Documentation/devicetree/bindings/timer
parent651022382c7f8da46cb4872a545ee1da6d097d2a (diff)
dt-bindings: timer: meson6_timer: document all interrupts
The meson6_timer IP block supports four timers - each of them has it's own interrupt line. Update the documentation to reflect that all four interrupts should be passed. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Diffstat (limited to 'Documentation/devicetree/bindings/timer')
-rw-r--r--Documentation/devicetree/bindings/timer/amlogic,meson6-timer.txt7
1 files changed, 5 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/timer/amlogic,meson6-timer.txt b/Documentation/devicetree/bindings/timer/amlogic,meson6-timer.txt
index a092053f7902..dbdda92cffb7 100644
--- a/Documentation/devicetree/bindings/timer/amlogic,meson6-timer.txt
+++ b/Documentation/devicetree/bindings/timer/amlogic,meson6-timer.txt
@@ -4,12 +4,15 @@ Required properties:
- compatible : should be "amlogic,meson6-timer"
- reg : Specifies base physical address and size of the registers.
-- interrupts : The interrupt of the first timer
+- interrupts : The four interrupts, one for each timer event
Example:
timer@c1109940 {
compatible = "amlogic,meson6-timer";
reg = <0xc1109940 0x14>;
- interrupts = <0 10 1>;
+ interrupts = <GIC_SPI 10 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 11 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 6 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 29 IRQ_TYPE_EDGE_RISING>;
};