summaryrefslogtreecommitdiff
path: root/Documentation/devicetree/bindings/tty
diff options
context:
space:
mode:
authorJamie Iles <jamie@jamieiles.com>2011-08-26 19:04:50 +0100
committerGreg Kroah-Hartman <gregkh@suse.de>2011-08-26 11:38:46 -0700
commit7d4008ebb1c971ce4baf57e45993690b0fa6d9f9 (patch)
treed316b3c7fc44cd77124b3c85a57603dea3c000f2 /Documentation/devicetree/bindings/tty
parentc7a1bdc5c951aae15021d13e3f5c0b2fe9d56112 (diff)
tty: add a DesignWare 8250 driver
The Synopsys DesignWare 8250 is an 8250 that has an extra interrupt that gets raised when writing to the LCR when busy. To handle this we need special serial_out, serial_in and handle_irq methods. Add a new platform driver that uses these accessors. Cc: Alan Cox <alan@linux.intel.com> Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jamie Iles <jamie@jamieiles.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'Documentation/devicetree/bindings/tty')
-rw-r--r--Documentation/devicetree/bindings/tty/serial/snps-dw-apb-uart.txt25
1 files changed, 25 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/tty/serial/snps-dw-apb-uart.txt b/Documentation/devicetree/bindings/tty/serial/snps-dw-apb-uart.txt
new file mode 100644
index 000000000000..f13f1c5be91c
--- /dev/null
+++ b/Documentation/devicetree/bindings/tty/serial/snps-dw-apb-uart.txt
@@ -0,0 +1,25 @@
+* Synopsys DesignWare ABP UART
+
+Required properties:
+- compatible : "snps,dw-apb-uart"
+- reg : offset and length of the register set for the device.
+- interrupts : should contain uart interrupt.
+- clock-frequency : the input clock frequency for the UART.
+
+Optional properties:
+- reg-shift : quantity to shift the register offsets by. If this property is
+ not present then the register offsets are not shifted.
+- reg-io-width : the size (in bytes) of the IO accesses that should be
+ performed on the device. If this property is not present then single byte
+ accesses are used.
+
+Example:
+
+ uart@80230000 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x80230000 0x100>;
+ clock-frequency = <3686400>;
+ interrupts = <10>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ };