diff options
| author | Li Jun <b47624@freescale.com> | 2015-01-20 16:03:35 +0800 |
|---|---|---|
| committer | Leonard Crestez <leonard.crestez@nxp.com> | 2018-08-23 16:42:42 +0300 |
| commit | 74b323ea38e809b942252a01bf6a5749fc188c27 (patch) | |
| tree | 4b371dd63383262028e9d23459626e9d4a61f9b6 /Documentation/devicetree/bindings/usb | |
| parent | 4fe38e048f4299ce7a73a0fe935fc85eb52d29bf (diff) | |
MLK-10086-1 usb: doc: ci-hdrc-imx: update for hsic controller
Update for HSIC controller
Signed-off-by: Peter Chen <peter.chen@freescale.com>
(cherry picked from commit c68e2fee7a6e321db9bb56b42853fe90a4e398ee)
Diffstat (limited to 'Documentation/devicetree/bindings/usb')
| -rw-r--r-- | Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt index 366c884e9ac8..db7bc373b528 100644 --- a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt +++ b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt @@ -90,6 +90,12 @@ i.mx specific properties please do not set it. - fsl,anatop: phandle for anatop module, anatop module is only existed at imx6 SoC series. +- pinctrl-names: for names of hsic pin group +- pinctrl-0: hsic "idle" pin group +- pinctrl-1: hsic "active" pin group +- osc-clkgate-delay: the delay between powering up the xtal 24MHz clock + and release the clock to the digital logic inside the analog block, + 0 <= osc-clkgate-delay <= 7. Examples: @@ -120,6 +126,10 @@ Examples: external-vbus-divider; imx6-usb-charger-detection; fsl,anatop = <&anatop>; + pinctrl-names = "idle", "active"; + pinctrl-0 = <&pinctrl_usbh2_1>; + pinctrl-1 = <&pinctrl_usbh2_2>; + osc-clkgate-delay = <0x3>; maximum-speed = "full-speed"; tpl-support; }; |