diff options
| author | Ran Wang <ran.wang_1@nxp.com> | 2019-12-19 17:06:09 +0800 |
|---|---|---|
| committer | Ran Wang <ran.wang_1@nxp.com> | 2019-12-19 17:07:09 +0800 |
| commit | 9ff38337a07725e612f4e2b971c749486a715f68 (patch) | |
| tree | 3eb9e4a458e8f0b03e2f896d454d89d5a461c2b9 /Documentation/devicetree/bindings/usb | |
| parent | b00fffd7a27768de411fa236a46ac560e7cdf7c8 (diff) | |
LF-387-2 Revert "usb: dwc3: Add chip-specific compatible string"
This reverts commit b1b26e7ed411daade797a9397119aa1ce472f54e.
Will use next version patch to replace this.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Diffstat (limited to 'Documentation/devicetree/bindings/usb')
| -rw-r--r-- | Documentation/devicetree/bindings/usb/dwc3.txt | 10 |
1 files changed, 1 insertions, 9 deletions
diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt index 45043c4c54ae..d2d5a8e99db5 100644 --- a/Documentation/devicetree/bindings/usb/dwc3.txt +++ b/Documentation/devicetree/bindings/usb/dwc3.txt @@ -4,15 +4,7 @@ DWC3- USB3 CONTROLLER. Complies to the generic USB binding properties as described in 'usb/generic.txt' Required properties: - - compatible: must be "snps,dwc3" and (if applicable) may contain a - chip-specific compatible string in front of it to allow dwc3 driver be - able to update cache type configuration accordingly, otherwise - Layerscape SoC will encounter USB init failure when adding property - dma-coherent on device tree. - Example: - * "fsl,layerscape-dwc3", "snps,dwc3" - * "snps,dwc3" - + - compatible: must be "snps,dwc3" - reg : Address and length of the register set for the device - interrupts: Interrupts used by the dwc3 controller. - clock-names: should contain "ref", "bus_early", "suspend" |