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authorArnd Bergmann <arnd@arndb.de>2012-03-16 19:51:30 +0000
committerArnd Bergmann <arnd@arndb.de>2012-03-16 19:51:30 +0000
commitd4ef467aea0fdcd5e75a4bbfaf97e579bbe532f3 (patch)
tree5b91923fb5031c6963a60ee33ee7671d178f26b2 /Documentation/devicetree/bindings
parent4acf18232f80c29906356f0f35b2d5f800b5953d (diff)
parent71de5c46e0600b72df58269e80da343e354ddbd7 (diff)
Merge branch 'ux500/dt' into next/dt2
* ux500/dt: ARM: ux500: Provide local timer support for Device Tree ARM: ux500: Enable PL022 SSP Controller in Device Tree ARM: ux500: Enable PL310 Level 2 Cache Controller in Device Tree ARM: ux500: Enable PL011 AMBA UART Controller for Device Tree ARM: ux500: Enable Cortex-A9 GIC (Generic Interrupt Controller) in Device Tree ARM: ux500: db8500: list most devices in the snowball device tree ARM: ux500: split dts file for snowball into generic part ARM: ux500: combine the board init functions for DT boot ARM: ux500: Initial Device Tree support for Snowball ARM: ux500: CONFIG: Enable Device Tree support for future endeavours ARM: ux500: fix compilation after local timer rework (adds dependency on localtimer branch, irqdomain branch and ux500/soc branch) Conflicts: arch/arm/mach-ux500/devices-common.c This adds patches from Lee Jones, Niklas Hernaeus and myself to provide initial device tree support on the ux500 platform. The pull request from Lee contained some other changes, so I rebased the patches on top of the branches that are actually dependencies for this. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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+* ARM Timer Watchdog
+
+ARM 11MP, Cortex-A5 and Cortex-A9 are often associated with a per-core
+Timer-Watchdog (aka TWD), which provides both a per-cpu local timer
+and watchdog.
+
+The TWD is usually attached to a GIC to deliver its two per-processor
+interrupts.
+
+** Timer node required properties:
+
+- compatible : Should be one of:
+ "arm,cortex-a9-twd-timer"
+ "arm,cortex-a5-twd-timer"
+ "arm,arm11mp-twd-timer"
+
+- interrupts : One interrupt to each core
+
+- reg : Specify the base address and the size of the TWD timer
+ register window.
+
+Example:
+
+ twd-timer@2c000600 {
+ compatible = "arm,arm11mp-twd-timer"";
+ reg = <0x2c000600 0x20>;
+ interrupts = <1 13 0xf01>;
+ };
+
+** Watchdog node properties:
+
+- compatible : Should be one of:
+ "arm,cortex-a9-twd-wdt"
+ "arm,cortex-a5-twd-wdt"
+ "arm,arm11mp-twd-wdt"
+
+- interrupts : One interrupt to each core
+
+- reg : Specify the base address and the size of the TWD watchdog
+ register window.
+
+Example:
+
+ twd-watchdog@2c000620 {
+ compatible = "arm,arm11mp-twd-wdt";
+ reg = <0x2c000620 0x20>;
+ interrupts = <1 14 0xf01>;
+ };