dt-bindings: gpu: ti: rogue: add am62p node updates

The driver was updated for AM62P to include a new optional property:
assigned-clock-rates. This property can be used to override the driver's
default frequency of 800MHz for the AM62P variant. This will be rolling
out to other devices soon.

In addition to this the second power domain had to be associated with
this device. Updating power-domain-names for expected values. Also add
the clock name for the main clock for clock rate tracking in the driver.

Add an example of the AM62P device node.

Signed-off-by: Randolph Sapp <rs@ti.com>

1 files changed, 80 insertions, 1 deletions

diff --git a/Documentation/devicetree/bindings/gpu/ti,rogue.yaml b/Documentation/devicetree/bindings/gpu/ti,rogue.yaml
index 5ab5bfd095b8..e3e305740e96 100644
--- a/Documentation/devicetree/bindings/gpu/ti,rogue.yaml
+++ b/Documentation/devicetree/bindings/gpu/ti,rogue.yaml
@@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/gpu/ti,rogue.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#
 
-title: Texas Instruments PowerVR Rogue GPU Bindings
+title: Texas Instruments PowerVR Rogue GPU
 
 description: |
   PowerVR Rogue is a family of 3D graphics processing units from Imagination
@@ -34,6 +34,10 @@ properties:
           - enum:
               - ti,j721e-pvr
           - const: img,pvr-ge8430
+      - items:
+          - enum:
+              - ti,am62p-pvr
+          - const: img,pvr-bxs64
 
   reg:
     maxItems: 1
@@ -44,8 +48,25 @@ properties:
   clocks:
     maxItems: 1
 
+  clock-names:
+    maxItems: 1
+
   power-domains:
+    minItems: 1
+    maxItems: 2
+
+  power-domain-names:
+    maxItems: 2
+
+  assigned-clocks:
+    maxItems: 1
+
+  assigned-clock-rates:
     maxItems: 1
+    description: |
+      Allows users to override the default clock value used for the GPU.
+      Currently ignored on devices other than ti,am62p-pvr. This will be ported
+      to other devices soon.
 
 required:
   - compatible
@@ -75,6 +96,42 @@ allOf:
           minItems: 1
         power-domains:
           minItems: 1
+          maxItems: 1
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - ti,am62p-pvr
+    then:
+      required:
+        - power-domain-names
+        - assigned-clocks
+        - clock-names
+      properties:
+        reg:
+          minItems: 1
+        interrupts:
+          minItems: 1
+        clocks:
+          minItems: 1
+        clock-names:
+          items:
+            - const: core
+        power-domains:
+          minItems: 2
+        power-domain-names:
+          items:
+            - const: firmware
+            - const: dust
+        assigned-clocks:
+          minItems: 1
+        assigned-clock-rates:
+          default: 800000000
+    else:
+      properties:
+        assigned-clocks: false
+        assigned-clock-rates: false
 
 examples:
   - |
@@ -127,4 +184,26 @@ examples:
             clocks = <&k3_clks 125 0>;
         };
     };
+
+  - |
+    #include <dt-bindings/interrupt-controller/irq.h>
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/soc/ti,sci_pm_domain.h>
+
+    bus {
+        #address-cells = <2>;
+        #size-cells = <2>;
+        gpu@fd80000 {
+            compatible = "ti,am62p-pvr", "img,pvr-bxs64";
+            reg = <0x00 0x0fd80000 0x00 0x80000>;
+            interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
+            power-domains = <&k3_pds 237 TI_SCI_PD_EXCLUSIVE>,
+                            <&k3_pds 242 TI_SCI_PD_EXCLUSIVE>;
+            assigned-clocks = <&k3_clks 237 3>;
+            assigned-clock-rates = <720000000>;
+            power-domain-names = "firmware", "dust";
+            clocks = <&k3_clks 237 3>;
+            clock-names = "core";
+        };
+    };
 ...