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authorLinus Torvalds <torvalds@linux-foundation.org>2019-07-11 18:35:30 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2019-07-11 18:35:30 -0700
commitd06e4156430e7c5eb4f04dabcaa0d9e2fba335e3 (patch)
tree6a8e0663a501b321655dd12683a48635474c28f0 /Documentation/devicetree
parent8931084c0d017314ad025f19353f7c5c1d3782d8 (diff)
parentf59d261180f3b66367962f1974090815ce710056 (diff)
Merge tag 'devicetree-for-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull Devicetree updates from Rob Herring: - DT binding schema examples are now validated against the schemas. Various examples are fixed due to that. - Sync dtc with upstream version v1.5.0-30-g702c1b6c0e73 - Initial schemas for networking bindings. This includes ethernet, phy and mdio common bindings with several Allwinner and stmmac converted to the schema. - Conversion of more Arm top-level SoC/board bindings to DT schema - Conversion of PSCI binding to DT schema - Rework Arm CPU schema to coexist with other CPU schemas - Add a bunch of missing vendor prefixes and new ones for SoChip, Sipeed, Kontron, B&R Industrial Automation GmbH, and Espressif - Add Mediatek UART RX wakeup support to binding - Add reset to ST UART binding - Remove some Linuxisms from the endianness common-properties.txt binding - Make the flattened DT read-only after init - Ignore disabled reserved memory nodes - Clean-up some dead code in FDT functions * tag 'devicetree-for-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (56 commits) dt-bindings: vendor-prefixes: add Sipeed dt-bindings: vendor-prefixes: add SoChip dt-bindings: 83xx-512x-pci: Drop cell-index property dt-bindings: serial: add documentation for Rx in-band wakeup support dt-bindings: arm: Convert RDA Micro board/soc bindings to json-schema of: unittest: simplify getting the adapter of a client of/fdt: pass early_init_dt_reserve_memory_arch() with bool type nomap of/platform: Drop superfluous cast in of_device_make_bus_id() dt-bindings: usb: ehci: Fix example warnings dt-bindings: net: Use phy-mode instead of phy-connection-type dt-bindings: simple-framebuffer: Add requirement for pipelines dt-bindings: display: Fix simple-framebuffer example dt-bindings: net: mdio: Add child nodes dt-bindings: net: mdio: Add address and size cells dt-bindings: net: mdio: Add a nodename pattern dt-bindings: mtd: sunxi-nand: Drop 'maxItems' from child 'reg' property dt-bindings: arm: Limit cpus schema to only check Arm 'cpu' nodes dt-bindings: backlight: lm3630a: correct schema validation dt-bindings: net: dwmac: Deprecate the PHY reset properties dt-bindings: net: sun8i-emac: Convert the binding to a schemas ...
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r--Documentation/devicetree/bindings/Makefile2
-rw-r--r--Documentation/devicetree/bindings/arm/al,alpine.txt16
-rw-r--r--Documentation/devicetree/bindings/arm/al,alpine.yaml21
-rw-r--r--Documentation/devicetree/bindings/arm/arm-boards2
-rw-r--r--Documentation/devicetree/bindings/arm/axxia.txt12
-rw-r--r--Documentation/devicetree/bindings/arm/axxia.yaml19
-rw-r--r--Documentation/devicetree/bindings/arm/cpus.yaml487
-rw-r--r--Documentation/devicetree/bindings/arm/digicolor.txt6
-rw-r--r--Documentation/devicetree/bindings/arm/digicolor.yaml16
-rw-r--r--Documentation/devicetree/bindings/arm/idle-states.txt15
-rw-r--r--Documentation/devicetree/bindings/arm/moxart.txt12
-rw-r--r--Documentation/devicetree/bindings/arm/moxart.yaml19
-rw-r--r--Documentation/devicetree/bindings/arm/nxp/lpc32xx.txt8
-rw-r--r--Documentation/devicetree/bindings/arm/nxp/lpc32xx.yaml25
-rw-r--r--Documentation/devicetree/bindings/arm/psci.txt111
-rw-r--r--Documentation/devicetree/bindings/arm/psci.yaml163
-rw-r--r--Documentation/devicetree/bindings/arm/qcom.yaml14
-rw-r--r--Documentation/devicetree/bindings/arm/rda.txt17
-rw-r--r--Documentation/devicetree/bindings/arm/rda.yaml20
-rw-r--r--Documentation/devicetree/bindings/common-properties.txt17
-rw-r--r--Documentation/devicetree/bindings/display/simple-framebuffer.yaml25
-rw-r--r--Documentation/devicetree/bindings/ipmi/npcm7xx-kcs-bmc.txt2
-rw-r--r--Documentation/devicetree/bindings/leds/backlight/lm3630a-backlight.yaml21
-rw-r--r--Documentation/devicetree/bindings/mtd/allwinner,sun4i-a10-nand.yaml1
-rw-r--r--Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml56
-rw-r--r--Documentation/devicetree/bindings/net/allwinner,sun4i-a10-mdio.yaml70
-rw-r--r--Documentation/devicetree/bindings/net/allwinner,sun4i-emac.txt19
-rw-r--r--Documentation/devicetree/bindings/net/allwinner,sun4i-mdio.txt27
-rw-r--r--Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.txt27
-rw-r--r--Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml65
-rw-r--r--Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml321
-rw-r--r--Documentation/devicetree/bindings/net/dwmac-sun8i.txt201
-rw-r--r--Documentation/devicetree/bindings/net/ethernet-controller.yaml206
-rw-r--r--Documentation/devicetree/bindings/net/ethernet-phy.yaml177
-rw-r--r--Documentation/devicetree/bindings/net/ethernet.txt69
-rw-r--r--Documentation/devicetree/bindings/net/fixed-link.txt55
-rw-r--r--Documentation/devicetree/bindings/net/mdio.txt38
-rw-r--r--Documentation/devicetree/bindings/net/mdio.yaml74
-rw-r--r--Documentation/devicetree/bindings/net/phy.txt80
-rw-r--r--Documentation/devicetree/bindings/net/snps,dwmac.yaml411
-rw-r--r--Documentation/devicetree/bindings/net/stmmac.txt179
-rw-r--r--Documentation/devicetree/bindings/pci/83xx-512x-pci.txt1
-rw-r--r--Documentation/devicetree/bindings/pinctrl/nuvoton,npcm7xx-pinctrl.txt2
-rw-r--r--Documentation/devicetree/bindings/property-units.txt34
-rw-r--r--Documentation/devicetree/bindings/regulator/pv88060.txt2
-rw-r--r--Documentation/devicetree/bindings/serial/mtk-uart.txt13
-rw-r--r--Documentation/devicetree/bindings/serial/st,stm32-usart.txt1
-rw-r--r--Documentation/devicetree/bindings/sound/cs42l73.txt2
-rw-r--r--Documentation/devicetree/bindings/usb/generic-ehci.yaml3
-rw-r--r--Documentation/devicetree/bindings/vendor-prefixes.yaml76
50 files changed, 2071 insertions, 1189 deletions
diff --git a/Documentation/devicetree/bindings/Makefile b/Documentation/devicetree/bindings/Makefile
index 8a2774b5834b..6b0dfd5c17ba 100644
--- a/Documentation/devicetree/bindings/Makefile
+++ b/Documentation/devicetree/bindings/Makefile
@@ -25,7 +25,7 @@ DT_DOCS = $(shell \
DT_SCHEMA_FILES ?= $(addprefix $(src)/,$(DT_DOCS))
extra-y += $(patsubst $(src)/%.yaml,%.example.dts, $(DT_SCHEMA_FILES))
-extra-y += $(patsubst $(src)/%.yaml,%.example.dtb, $(DT_SCHEMA_FILES))
+extra-y += $(patsubst $(src)/%.yaml,%.example.dt.yaml, $(DT_SCHEMA_FILES))
$(obj)/$(DT_TMP_SCHEMA): $(DT_SCHEMA_FILES) FORCE
$(call if_changed,mk_schema)
diff --git a/Documentation/devicetree/bindings/arm/al,alpine.txt b/Documentation/devicetree/bindings/arm/al,alpine.txt
deleted file mode 100644
index d00debe2e86f..000000000000
--- a/Documentation/devicetree/bindings/arm/al,alpine.txt
+++ /dev/null
@@ -1,16 +0,0 @@
-Annapurna Labs Alpine Platform Device Tree Bindings
----------------------------------------------------------------
-
-Boards in the Alpine family shall have the following properties:
-
-* Required root node properties:
-compatible: must contain "al,alpine"
-
-* Example:
-
-/ {
- model = "Annapurna Labs Alpine Dev Board";
- compatible = "al,alpine";
-
- ...
-}
diff --git a/Documentation/devicetree/bindings/arm/al,alpine.yaml b/Documentation/devicetree/bindings/arm/al,alpine.yaml
new file mode 100644
index 000000000000..a70dff277e05
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/al,alpine.yaml
@@ -0,0 +1,21 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/al,alpine.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Annapurna Labs Alpine Platform Device Tree Bindings
+
+maintainers:
+ - Tsahee Zidenberg <tsahee@annapurnalabs.com>
+ - Antoine Tenart <antoine.tenart@bootlin.com>
+
+properties:
+ compatible:
+ items:
+ - const: al,alpine
+ model:
+ items:
+ - const: "Annapurna Labs Alpine Dev Board"
+
+...
diff --git a/Documentation/devicetree/bindings/arm/arm-boards b/Documentation/devicetree/bindings/arm/arm-boards
index abff8d834a6a..6758ece324b1 100644
--- a/Documentation/devicetree/bindings/arm/arm-boards
+++ b/Documentation/devicetree/bindings/arm/arm-boards
@@ -197,7 +197,7 @@ Required nodes:
The description for the board must include:
- a "psci" node describing the boot method used for the secondary CPUs.
A detailed description of the bindings used for "psci" nodes is present
- in the psci.txt file.
+ in the psci.yaml file.
- a "cpus" node describing the available cores and their associated
"enable-method"s. For more details see cpus.txt file.
diff --git a/Documentation/devicetree/bindings/arm/axxia.txt b/Documentation/devicetree/bindings/arm/axxia.txt
deleted file mode 100644
index 7b4ef9c07696..000000000000
--- a/Documentation/devicetree/bindings/arm/axxia.txt
+++ /dev/null
@@ -1,12 +0,0 @@
-Axxia AXM55xx device tree bindings
-
-Boards using the AXM55xx SoC need to have the following properties:
-
-Required root node property:
-
- - compatible = "lsi,axm5516"
-
-Boards:
-
- LSI AXM5516 Validation board (Amarillo)
- compatible = "lsi,axm5516-amarillo", "lsi,axm5516"
diff --git a/Documentation/devicetree/bindings/arm/axxia.yaml b/Documentation/devicetree/bindings/arm/axxia.yaml
new file mode 100644
index 000000000000..98780a569f22
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/axxia.yaml
@@ -0,0 +1,19 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/axxia.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Axxia AXM55xx device tree bindings
+
+maintainers:
+ - Anders Berg <anders.berg@lsi.com>
+
+properties:
+ compatible:
+ description: LSI AXM5516 Validation board (Amarillo)
+ items:
+ - const: lsi,axm5516-amarillo
+ - const: lsi,axm5516
+
+...
diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml
index 591bbd012d63..aa40b074b864 100644
--- a/Documentation/devicetree/bindings/arm/cpus.yaml
+++ b/Documentation/devicetree/bindings/arm/cpus.yaml
@@ -39,281 +39,242 @@ description: |+
described below.
properties:
- $nodename:
- const: cpus
- description: Container of cpu nodes
-
- '#address-cells':
- enum: [1, 2]
+ reg:
+ maxItems: 1
description: |
- Definition depends on ARM architecture version and configuration:
+ Usage and definition depend on ARM architecture version and
+ configuration:
On uniprocessor ARM architectures previous to v7
- value must be 1, to enable a simple enumeration
- scheme for processors that do not have a HW CPU
- identification register.
- On 32-bit ARM 11 MPcore, ARM v7 or later systems
- value must be 1, that corresponds to CPUID/MPIDR
- registers sizes.
- On ARM v8 64-bit systems value should be set to 2,
- that corresponds to the MPIDR_EL1 register size.
- If MPIDR_EL1[63:32] value is equal to 0 on all CPUs
- in the system, #address-cells can be set to 1, since
- MPIDR_EL1[63:32] bits are not used for CPUs
- identification.
-
- '#size-cells':
- const: 0
-
-patternProperties:
- '^cpu@[0-9a-f]+$':
- type: object
- properties:
- device_type:
- const: cpu
-
- reg:
- maxItems: 1
- description: |
- Usage and definition depend on ARM architecture version and
- configuration:
-
- On uniprocessor ARM architectures previous to v7
- this property is required and must be set to 0.
-
- On ARM 11 MPcore based systems this property is
- required and matches the CPUID[11:0] register bits.
-
- Bits [11:0] in the reg cell must be set to
- bits [11:0] in CPU ID register.
-
- All other bits in the reg cell must be set to 0.
-
- On 32-bit ARM v7 or later systems this property is
- required and matches the CPU MPIDR[23:0] register
- bits.
-
- Bits [23:0] in the reg cell must be set to
- bits [23:0] in MPIDR.
-
- All other bits in the reg cell must be set to 0.
-
- On ARM v8 64-bit systems this property is required
- and matches the MPIDR_EL1 register affinity bits.
+ this property is required and must be set to 0.
+
+ On ARM 11 MPcore based systems this property is
+ required and matches the CPUID[11:0] register bits.
+
+ Bits [11:0] in the reg cell must be set to
+ bits [11:0] in CPU ID register.
+
+ All other bits in the reg cell must be set to 0.
+
+ On 32-bit ARM v7 or later systems this property is
+ required and matches the CPU MPIDR[23:0] register
+ bits.
+
+ Bits [23:0] in the reg cell must be set to
+ bits [23:0] in MPIDR.
+
+ All other bits in the reg cell must be set to 0.
+
+ On ARM v8 64-bit systems this property is required
+ and matches the MPIDR_EL1 register affinity bits.
+
+ * If cpus node's #address-cells property is set to 2
+
+ The first reg cell bits [7:0] must be set to
+ bits [39:32] of MPIDR_EL1.
+
+ The second reg cell bits [23:0] must be set to
+ bits [23:0] of MPIDR_EL1.
+
+ * If cpus node's #address-cells property is set to 1
+
+ The reg cell bits [23:0] must be set to bits [23:0]
+ of MPIDR_EL1.
+
+ All other bits in the reg cells must be set to 0.
+
+ compatible:
+ enum:
+ - arm,arm710t
+ - arm,arm720t
+ - arm,arm740t
+ - arm,arm7ej-s
+ - arm,arm7tdmi
+ - arm,arm7tdmi-s
+ - arm,arm9es
+ - arm,arm9ej-s
+ - arm,arm920t
+ - arm,arm922t
+ - arm,arm925
+ - arm,arm926e-s
+ - arm,arm926ej-s
+ - arm,arm940t
+ - arm,arm946e-s
+ - arm,arm966e-s
+ - arm,arm968e-s
+ - arm,arm9tdmi
+ - arm,arm1020e
+ - arm,arm1020t
+ - arm,arm1022e
+ - arm,arm1026ej-s
+ - arm,arm1136j-s
+ - arm,arm1136jf-s
+ - arm,arm1156t2-s
+ - arm,arm1156t2f-s
+ - arm,arm1176jzf
+ - arm,arm1176jz-s
+ - arm,arm1176jzf-s
+ - arm,arm11mpcore
+ - arm,armv8 # Only for s/w models
+ - arm,cortex-a5
+ - arm,cortex-a7
+ - arm,cortex-a8
+ - arm,cortex-a9
+ - arm,cortex-a12
+ - arm,cortex-a15
+ - arm,cortex-a17
+ - arm,cortex-a53
+ - arm,cortex-a57
+ - arm,cortex-a72
+ - arm,cortex-a73
+ - arm,cortex-m0
+ - arm,cortex-m0+
+ - arm,cortex-m1
+ - arm,cortex-m3
+ - arm,cortex-m4
+ - arm,cortex-r4
+ - arm,cortex-r5
+ - arm,cortex-r7
+ - brcm,brahma-b15
+ - brcm,brahma-b53
+ - brcm,vulcan
+ - cavium,thunder
+ - cavium,thunder2
+ - faraday,fa526
+ - intel,sa110
+ - intel,sa1100
+ - marvell,feroceon
+ - marvell,mohawk
+ - marvell,pj4a
+ - marvell,pj4b
+ - marvell,sheeva-v5
+ - marvell,sheeva-v7
+ - nvidia,tegra132-denver
+ - nvidia,tegra186-denver
+ - nvidia,tegra194-carmel
+ - qcom,krait
+ - qcom,kryo
+ - qcom,kryo385
+ - qcom,scorpion
+
+ enable-method:
+ allOf:
+ - $ref: '/schemas/types.yaml#/definitions/string'
+ - oneOf:
+ # On ARM v8 64-bit this property is required
+ - enum:
+ - psci
+ - spin-table
+ # On ARM 32-bit systems this property is optional
+ - enum:
+ - actions,s500-smp
+ - allwinner,sun6i-a31
+ - allwinner,sun8i-a23
+ - allwinner,sun9i-a80-smp
+ - allwinner,sun8i-a83t-smp
+ - amlogic,meson8-smp
+ - amlogic,meson8b-smp
+ - arm,realview-smp
+ - brcm,bcm11351-cpu-method
+ - brcm,bcm23550
+ - brcm,bcm2836-smp
+ - brcm,bcm63138
+ - brcm,bcm-nsp-smp
+ - brcm,brahma-b15
+ - marvell,armada-375-smp
+ - marvell,armada-380-smp
+ - marvell,armada-390-smp
+ - marvell,armada-xp-smp
+ - marvell,98dx3236-smp
+ - mediatek,mt6589-smp
+ - mediatek,mt81xx-tz-smp
+ - qcom,gcc-msm8660
+ - qcom,kpss-acc-v1
+ - qcom,kpss-acc-v2
+ - renesas,apmu
+ - renesas,r9a06g032-smp
+ - rockchip,rk3036-smp
+ - rockchip,rk3066-smp
+ - socionext,milbeaut-m10v-smp
+ - ste,dbx500-smp
+
+ cpu-release-addr:
+ $ref: '/schemas/types.yaml#/definitions/uint64'
+
+ description:
+ Required for systems that have an "enable-method"
+ property value of "spin-table".
+ On ARM v8 64-bit systems must be a two cell
+ property identifying a 64-bit zero-initialised
+ memory location.
+
+ cpu-idle-states:
+ $ref: '/schemas/types.yaml#/definitions/phandle-array'
+ description: |
+ List of phandles to idle state nodes supported
+ by this cpu (see ./idle-states.txt).
+
+ capacity-dmips-mhz:
+ $ref: '/schemas/types.yaml#/definitions/uint32'
+ description:
+ u32 value representing CPU capacity (see ./cpu-capacity.txt) in
+ DMIPS/MHz, relative to highest capacity-dmips-mhz
+ in the system.
+
+ dynamic-power-coefficient:
+ $ref: '/schemas/types.yaml#/definitions/uint32'
+ description:
+ A u32 value that represents the running time dynamic
+ power coefficient in units of uW/MHz/V^2. The
+ coefficient can either be calculated from power
+ measurements or derived by analysis.
+
+ The dynamic power consumption of the CPU is
+ proportional to the square of the Voltage (V) and
+ the clock frequency (f). The coefficient is used to
+ calculate the dynamic power as below -
+
+ Pdyn = dynamic-power-coefficient * V^2 * f
+
+ where voltage is in V, frequency is in MHz.
+
+ qcom,saw:
+ $ref: '/schemas/types.yaml#/definitions/phandle'
+ description: |
+ Specifies the SAW* node associated with this CPU.
- * If cpus node's #address-cells property is set to 2
+ Required for systems that have an "enable-method" property
+ value of "qcom,kpss-acc-v1" or "qcom,kpss-acc-v2"
- The first reg cell bits [7:0] must be set to
- bits [39:32] of MPIDR_EL1.
+ * arm/msm/qcom,saw2.txt
- The second reg cell bits [23:0] must be set to
- bits [23:0] of MPIDR_EL1.
+ qcom,acc:
+ $ref: '/schemas/types.yaml#/definitions/phandle'
+ description: |
+ Specifies the ACC* node associated with this CPU.
- * If cpus node's #address-cells property is set to 1
+ Required for systems that have an "enable-method" property
+ value of "qcom,kpss-acc-v1" or "qcom,kpss-acc-v2"
- The reg cell bits [23:0] must be set to bits [23:0]
- of MPIDR_EL1.
+ * arm/msm/qcom,kpss-acc.txt
- All other bits in the reg cells must be set to 0.
+ rockchip,pmu:
+ $ref: '/schemas/types.yaml#/definitions/phandle'
+ description: |
+ Specifies the syscon node controlling the cpu core power domains.
- compatible:
- items:
- - enum:
- - arm,arm710t
- - arm,arm720t
- - arm,arm740t
- - arm,arm7ej-s
- - arm,arm7tdmi
- - arm,arm7tdmi-s
- - arm,arm9es
- - arm,arm9ej-s
- - arm,arm920t
- - arm,arm922t
- - arm,arm925
- - arm,arm926e-s
- - arm,arm926ej-s
- - arm,arm940t
- - arm,arm946e-s
- - arm,arm966e-s
- - arm,arm968e-s
- - arm,arm9tdmi
- - arm,arm1020e
- - arm,arm1020t
- - arm,arm1022e
- - arm,arm1026ej-s
- - arm,arm1136j-s
- - arm,arm1136jf-s
- - arm,arm1156t2-s
- - arm,arm1156t2f-s
- - arm,arm1176jzf
- - arm,arm1176jz-s
- - arm,arm1176jzf-s
- - arm,arm11mpcore
- - arm,armv8 # Only for s/w models
- - arm,cortex-a5
- - arm,cortex-a7
- - arm,cortex-a8
- - arm,cortex-a9
- - arm,cortex-a12
- - arm,cortex-a15
- - arm,cortex-a17
- - arm,cortex-a53
- - arm,cortex-a57
- - arm,cortex-a72
- - arm,cortex-a73
- - arm,cortex-m0
- - arm,cortex-m0+
- - arm,cortex-m1
- - arm,cortex-m3
- - arm,cortex-m4
- - arm,cortex-r4
- - arm,cortex-r5
- - arm,cortex-r7
- - brcm,brahma-b15
- - brcm,brahma-b53
- - brcm,vulcan
- - cavium,thunder
- - cavium,thunder2
- - faraday,fa526
- - intel,sa110
- - intel,sa1100
- - marvell,feroceon
- - marvell,mohawk
- - marvell,pj4a
- - marvell,pj4b
- - marvell,sheeva-v5
- - marvell,sheeva-v7
- - nvidia,tegra132-denver
- - nvidia,tegra186-denver
- - nvidia,tegra194-carmel
- - qcom,krait
- - qcom,kryo
- - qcom,kryo385
- - qcom,scorpion
-
- enable-method:
- allOf:
- - $ref: '/schemas/types.yaml#/definitions/string'
- - oneOf:
- # On ARM v8 64-bit this property is required
- - enum:
- - psci
- - spin-table
- # On ARM 32-bit systems this property is optional
- - enum:
- - actions,s500-smp
- - allwinner,sun6i-a31
- - allwinner,sun8i-a23
- - allwinner,sun9i-a80-smp
- - allwinner,sun8i-a83t-smp
- - amlogic,meson8-smp
- - amlogic,meson8b-smp
- - arm,realview-smp
- - brcm,bcm11351-cpu-method
- - brcm,bcm23550
- - brcm,bcm2836-smp
- - brcm,bcm63138
- - brcm,bcm-nsp-smp
- - brcm,brahma-b15
- - marvell,armada-375-smp
- - marvell,armada-380-smp
- - marvell,armada-390-smp
- - marvell,armada-xp-smp
- - marvell,98dx3236-smp
- - mediatek,mt6589-smp
- - mediatek,mt81xx-tz-smp
- - qcom,gcc-msm8660
- - qcom,kpss-acc-v1
- - qcom,kpss-acc-v2
- - renesas,apmu
- - renesas,r9a06g032-smp
- - rockchip,rk3036-smp
- - rockchip,rk3066-smp
- - socionext,milbeaut-m10v-smp
- - ste,dbx500-smp
-
- cpu-release-addr:
- $ref: '/schemas/types.yaml#/definitions/uint64'
-
- description:
- Required for systems that have an "enable-method"
- property value of "spin-table".
- On ARM v8 64-bit systems must be a two cell
- property identifying a 64-bit zero-initialised
- memory location.
-
- cpu-idle-states:
- $ref: '/schemas/types.yaml#/definitions/phandle-array'
- description: |
- List of phandles to idle state nodes supported
- by this cpu (see ./idle-states.txt).
-
- capacity-dmips-mhz:
- $ref: '/schemas/types.yaml#/definitions/uint32'
- description:
- u32 value representing CPU capacity (see ./cpu-capacity.txt) in
- DMIPS/MHz, relative to highest capacity-dmips-mhz
- in the system.
-
- dynamic-power-coefficient:
- $ref: '/schemas/types.yaml#/definitions/uint32'
- description:
- A u32 value that represents the running time dynamic
- power coefficient in units of uW/MHz/V^2. The
- coefficient can either be calculated from power
- measurements or derived by analysis.
-
- The dynamic power consumption of the CPU is
- proportional to the square of the Voltage (V) and
- the clock frequency (f). The coefficient is used to
- calculate the dynamic power as below -
-
- Pdyn = dynamic-power-coefficient * V^2 * f
-
- where voltage is in V, frequency is in MHz.
-
- qcom,saw:
- $ref: '/schemas/types.yaml#/definitions/phandle'
- description: |
- Specifies the SAW* node associated with this CPU.
-
- Required for systems that have an "enable-method" property
- value of "qcom,kpss-acc-v1" or "qcom,kpss-acc-v2"
-
- * arm/msm/qcom,saw2.txt
-
- qcom,acc:
- $ref: '/schemas/types.yaml#/definitions/phandle'
- description: |
- Specifies the ACC* node associated with this CPU.
-
- Required for systems that have an "enable-method" property
- value of "qcom,kpss-acc-v1" or "qcom,kpss-acc-v2"
-
- * arm/msm/qcom,kpss-acc.txt
-
- rockchip,pmu:
- $ref: '/schemas/types.yaml#/definitions/phandle'
- description: |
- Specifies the syscon node controlling the cpu core power domains.
-
- Optional for systems that have an "enable-method"
- property value of "rockchip,rk3066-smp"
- While optional, it is the preferred way to get access to
- the cpu-core power-domains.
-
- required:
- - device_type
- - reg
- - compatible
-
- dependencies:
- cpu-release-addr: [enable-method]
- rockchip,pmu: [enable-method]
+ Optional for systems that have an "enable-method"
+ property value of "rockchip,rk3066-smp"
+ While optional, it is the preferred way to get access to
+ the cpu-core power-domains.
required:
- - '#address-cells'
- - '#size-cells'
+ - device_type
+ - reg
+ - compatible
+
+dependencies:
+ rockchip,pmu: [enable-method]
examples:
- |
diff --git a/Documentation/devicetree/bindings/arm/digicolor.txt b/Documentation/devicetree/bindings/arm/digicolor.txt
deleted file mode 100644
index 658553f40b23..000000000000
--- a/Documentation/devicetree/bindings/arm/digicolor.txt
+++ /dev/null
@@ -1,6 +0,0 @@
-Conexant Digicolor Platforms Device Tree Bindings
-
-Each device tree must specify which Conexant Digicolor SoC it uses.
-Must be the following compatible string:
-
- cnxt,cx92755
diff --git a/Documentation/devicetree/bindings/arm/digicolor.yaml b/Documentation/devicetree/bindings/arm/digicolor.yaml
new file mode 100644
index 000000000000..d9c80b827e9b
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/digicolor.yaml
@@ -0,0 +1,16 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/digicolor.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Conexant Digicolor Platforms Device Tree Bindings
+
+maintainers:
+ - Baruch Siach <baruch@tkos.co.il>
+
+properties:
+ compatible:
+ const: cnxt,cx92755
+
+...
diff --git a/Documentation/devicetree/bindings/arm/idle-states.txt b/Documentation/devicetree/bindings/arm/idle-states.txt
index 45730ba60af5..326f29b270ad 100644
--- a/Documentation/devicetree/bindings/arm/idle-states.txt
+++ b/Documentation/devicetree/bindings/arm/idle-states.txt
@@ -241,9 +241,13 @@ processor idle states, defined as device tree nodes, are listed.
- "psci"
# On ARM 32-bit systems this property is optional
-The nodes describing the idle states (state) can only be defined within the
-idle-states node, any other configuration is considered invalid and therefore
-must be ignored.
+This assumes that the "enable-method" property is set to "psci" in the cpu
+node[6] that is responsible for setting up CPU idle management in the OS
+implementation.
+
+The nodes describing the idle states (state) can only be defined
+within the idle-states node, any other configuration is considered invalid
+and therefore must be ignored.
===========================================
4 - state node
@@ -687,7 +691,7 @@ cpus {
Documentation/devicetree/bindings/arm/cpus.yaml
[2] ARM Linux Kernel documentation - PSCI bindings
- Documentation/devicetree/bindings/arm/psci.txt
+ Documentation/devicetree/bindings/arm/psci.yaml
[3] ARM Server Base System Architecture (SBSA)
http://infocenter.arm.com/help/index.jsp
@@ -697,3 +701,6 @@ cpus {
[5] Devicetree Specification
https://www.devicetree.org/specifications/
+
+[6] ARM Linux Kernel documentation - Booting AArch64 Linux
+ Documentation/arm64/booting.txt
diff --git a/Documentation/devicetree/bindings/arm/moxart.txt b/Documentation/devicetree/bindings/arm/moxart.txt
deleted file mode 100644
index 11087edb0658..000000000000
--- a/Documentation/devicetree/bindings/arm/moxart.txt
+++ /dev/null
@@ -1,12 +0,0 @@
-MOXA ART device tree bindings
-
-Boards with the MOXA ART SoC shall have the following properties:
-
-Required root node property:
-
-compatible = "moxa,moxart";
-
-Boards:
-
-- UC-7112-LX: embedded computer
- compatible = "moxa,moxart-uc-7112-lx", "moxa,moxart"
diff --git a/Documentation/devicetree/bindings/arm/moxart.yaml b/Documentation/devicetree/bindings/arm/moxart.yaml
new file mode 100644
index 000000000000..c068df59fad2
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/moxart.yaml
@@ -0,0 +1,19 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/moxart.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MOXA ART device tree bindings
+
+maintainers:
+ - Jonas Jensen <jonas.jensen@gmail.com>
+
+properties:
+ compatible:
+ description: UC-7112-LX embedded computer
+ items:
+ - const: moxa,moxart-uc-7112-lx
+ - const: moxa,moxart
+
+...
diff --git a/Documentation/devicetree/bindings/arm/nxp/lpc32xx.txt b/Documentation/devicetree/bindings/arm/nxp/lpc32xx.txt
deleted file mode 100644
index 56ec8ddc4a3b..000000000000
--- a/Documentation/devicetree/bindings/arm/nxp/lpc32xx.txt
+++ /dev/null
@@ -1,8 +0,0 @@
-NXP LPC32xx Platforms Device Tree Bindings
-------------------------------------------
-
-Boards with the NXP LPC32xx SoC shall have the following properties:
-
-Required root node property:
-
-compatible: must be "nxp,lpc3220", "nxp,lpc3230", "nxp,lpc3240" or "nxp,lpc3250"
diff --git a/Documentation/devicetree/bindings/arm/nxp/lpc32xx.yaml b/Documentation/devicetree/bindings/arm/nxp/lpc32xx.yaml
new file mode 100644
index 000000000000..07f39d3eee7e
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/nxp/lpc32xx.yaml
@@ -0,0 +1,25 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/nxp/lpc32xx.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP LPC32xx Platforms Device Tree Bindings
+
+maintainers:
+ - Roland Stigge <stigge@antcom.de>
+
+properties:
+ compatible:
+ oneOf:
+ - enum:
+ - nxp,lpc3220
+ - nxp,lpc3230
+ - nxp,lpc3240
+ - items:
+ - enum:
+ - ea,ea3250
+ - phytec,phy3250
+ - const: nxp,lpc3250
+
+...
diff --git a/Documentation/devicetree/bindings/arm/psci.txt b/Documentation/devicetree/bindings/arm/psci.txt
deleted file mode 100644
index a2c4f1d52492..000000000000
--- a/Documentation/devicetree/bindings/arm/psci.txt
+++ /dev/null
@@ -1,111 +0,0 @@
-* Power State Coordination Interface (PSCI)
-
-Firmware implementing the PSCI functions described in ARM document number
-ARM DEN 0022A ("Power State Coordination Interface System Software on ARM
-processors") can be used by Linux to initiate various CPU-centric power
-operations.
-
-Issue A of the specification describes functions for CPU suspend, hotplug
-and migration of secure software.
-
-Functions are invoked by trapping to the privilege level of the PSCI
-firmware (specified as part of the binding below) and passing arguments
-in a manner similar to that specified by AAPCS:
-
- r0 => 32-bit Function ID / return value
- {r1 - r3} => Parameters
-
-Note that the immediate field of the trapping instruction must be set
-to #0.
-
-
-Main node required properties:
-
- - compatible : should contain at least one of:
-
- * "arm,psci" : For implementations complying to PSCI versions prior
- to 0.2.
- For these cases function IDs must be provided.
-
- * "arm,psci-0.2" : For implementations complying to PSCI 0.2.
- Function IDs are not required and should be ignored by
- an OS with PSCI 0.2 support, but are permitted to be
- present for compatibility with existing software when
- "arm,psci" is later in the compatible list.
-
- * "arm,psci-1.0" : For implementations complying to PSCI 1.0.
- PSCI 1.0 is backward compatible with PSCI 0.2 with
- minor specification updates, as defined in the PSCI
- specification[2].
-
- - method : The method of calling the PSCI firmware. Permitted
- values are:
-
- "smc" : SMC #0, with the register assignments specified
- in this binding.
-
- "hvc" : HVC #0, with the register assignments specified
- in this binding.
-
-Main node optional properties:
-
- - cpu_suspend : Function ID for CPU_SUSPEND operation
-
- - cpu_off : Function ID for CPU_OFF operation
-
- - cpu_on : Function ID for CPU_ON operation
-
- - migrate : Function ID for MIGRATE operation
-
-Device tree nodes that require usage of PSCI CPU_SUSPEND function (ie idle
-state nodes, as per bindings in [1]) must specify the following properties:
-
-- arm,psci-suspend-param
- Usage: Required for state nodes[1] if the corresponding
- idle-states node entry-method property is set
- to "psci".
- Value type: <u32>
- Definition: power_state parameter to pass to the PSCI
- suspend call.
-
-Example:
-
-Case 1: PSCI v0.1 only.
-
- psci {
- compatible = "arm,psci";
- method = "smc";
- cpu_suspend = <0x95c10000>;
- cpu_off = <0x95c10001>;
- cpu_on = <0x95c10002>;
- migrate = <0x95c10003>;
- };
-
-Case 2: PSCI v0.2 only
-
- psci {
- compatible = "arm,psci-0.2";
- method = "smc";
- };
-
-Case 3: PSCI v0.2 and PSCI v0.1.
-
- A DTB may provide IDs for use by kernels without PSCI 0.2 support,
- enabling firmware and hypervisors to support existing and new kernels.
- These IDs will be ignored by kernels with PSCI 0.2 support, which will
- use the standard PSCI 0.2 IDs exclusively.
-
- psci {
- compatible = "arm,psci-0.2", "arm,psci";
- method = "hvc";
-
- cpu_on = < arbitrary value >;
- cpu_off = < arbitrary value >;
-
- ...
- };
-
-[1] Kernel documentation - ARM idle states bindings
- Documentation/devicetree/bindings/arm/idle-states.txt
-[2] Power State Coordination Interface (PSCI) specification
- http://infocenter.arm.com/help/topic/com.arm.doc.den0022c/DEN0022C_Power_State_Coordination_Interface.pdf
diff --git a/Documentation/devicetree/bindings/arm/psci.yaml b/Documentation/devicetree/bindings/arm/psci.yaml
new file mode 100644
index 000000000000..7abdf58b335e
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/psci.yaml
@@ -0,0 +1,163 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/psci.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Power State Coordination Interface (PSCI)
+
+maintainers:
+ - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
+
+description: |+
+ Firmware implementing the PSCI functions described in ARM document number
+ ARM DEN 0022A ("Power State Coordination Interface System Software on ARM
+ processors") can be used by Linux to initiate various CPU-centric power
+ operations.
+
+ Issue A of the specification describes functions for CPU suspend, hotplug
+ and migration of secure software.
+
+ Functions are invoked by trapping to the privilege level of the PSCI
+ firmware (specified as part of the binding below) and passing arguments
+ in a manner similar to that specified by AAPCS:
+
+ r0 => 32-bit Function ID / return value
+ {r1 - r3} => Parameters
+
+ Note that the immediate field of the trapping instruction must be set
+ to #0.
+
+ [2] Power State Coordination Interface (PSCI) specification
+ http://infocenter.arm.com/help/topic/com.arm.doc.den0022c/DEN0022C_Power_State_Coordination_Interface.pdf
+
+properties:
+ compatible:
+ oneOf:
+ - description:
+ For implementations complying to PSCI versions prior to 0.2.
+ const: arm,psci
+
+ - description:
+ For implementations complying to PSCI 0.2.
+ const: arm,psci-0.2
+
+ - description:
+ For implementations complying to PSCI 0.2.
+ Function IDs are not required and should be ignored by an OS with
+ PSCI 0.2 support, but are permitted to be present for compatibility
+ with existing software when "arm,psci" is later in the compatible
+ list.
+ items:
+ - const: arm,psci-0.2
+ - const: arm,psci
+
+ - description:
+ For implementations complying to PSCI 1.0.
+ const: arm,psci-1.0
+
+ - description:
+ For implementations complying to PSCI 1.0.
+ PSCI 1.0 is backward compatible with PSCI 0.2 with minor
+ specification updates, as defined in the PSCI specification[2].
+ items:
+ - const: arm,psci-1.0
+ - const: arm,psci-0.2
+
+ method:
+ description: The method of calling the PSCI firmware.
+ allOf:
+ - $ref: /schemas/types.yaml#/definitions/string-array
+ - enum:
+ # SMC #0, with the register assignments specified in this binding.
+ - smc
+ # HVC #0, with the register assignments specified in this binding.
+ - hvc
+
+ cpu_suspend:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: Function ID for CPU_SUSPEND operation
+
+ cpu_off:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: Function ID for CPU_OFF operation
+
+ cpu_on:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: Function ID for CPU_ON operation
+
+ migrate:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: Function ID for MIGRATE operation
+
+ arm,psci-suspend-param:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: |
+ power_state parameter to pass to the PSCI suspend call.
+
+ Device tree nodes that require usage of PSCI CPU_SUSPEND function (ie
+ idle state nodes with entry-method property is set to "psci", as per
+ bindings in [1]) must specify this property.
+
+ [1] Kernel documentation - ARM idle states bindings
+ Documentation/devicetree/bindings/arm/idle-states.txt
+
+
+required:
+ - compatible
+ - method
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: arm,psci
+ then:
+ required:
+ - cpu_off
+ - cpu_on
+
+examples:
+ - |+
+
+ // Case 1: PSCI v0.1 only.
+
+ psci {
+ compatible = "arm,psci";
+ method = "smc";
+ cpu_suspend = <0x95c10000>;
+ cpu_off = <0x95c10001>;
+ cpu_on = <0x95c10002>;
+ migrate = <0x95c10003>;
+ };
+
+ - |+
+
+ // Case 2: PSCI v0.2 only
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+
+ - |+
+
+ // Case 3: PSCI v0.2 and PSCI v0.1.
+
+ /*
+ * A DTB may provide IDs for use by kernels without PSCI 0.2 support,
+ * enabling firmware and hypervisors to support existing and new kernels.
+ * These IDs will be ignored by kernels with PSCI 0.2 support, which will
+ * use the standard PSCI 0.2 IDs exclusively.
+ */
+
+ psci {
+ compatible = "arm,psci-0.2", "arm,psci";
+ method = "hvc";
+
+ cpu_on = <0x95c10002>;
+ cpu_off = <0x95c10001>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml
index f6316ab66385..54ef6b6b9189 100644
--- a/Documentation/devicetree/bindings/arm/qcom.yaml
+++ b/Documentation/devicetree/bindings/arm/qcom.yaml
@@ -102,6 +102,15 @@ properties:
- const: qcom,msm8960
- items:
+ - enum:
+ - fairphone,fp2
+ - lge,hammerhead
+ - sony,xperia-amami
+ - sony,xperia-castor
+ - sony,xperia-honami
+ - const: qcom,msm8974
+
+ - items:
- const: qcom,msm8916-mtp/1
- const: qcom,msm8916-mtp
- const: qcom,msm8916
@@ -110,6 +119,11 @@ properties:
- const: qcom,msm8996-mtp
- items:
+ - enum:
+ - qcom,ipq4019-ap-dk04.1-c3
+ - qcom,ipq4019-ap-dk07.1-c1
+ - qcom,ipq4019-ap-dk07.1-c2
+ - qcom,ipq4019-dk04.1-c1
- const: qcom,ipq4019
- items:
diff --git a/Documentation/devicetree/bindings/arm/rda.txt b/Documentation/devicetree/bindings/arm/rda.txt
deleted file mode 100644
index 43c80762c428..000000000000
--- a/Documentation/devicetree/bindings/arm/rda.txt
+++ /dev/null
@@ -1,17 +0,0 @@
-RDA Micro platforms device tree bindings
-----------------------------------------
-
-RDA8810PL SoC
-=============
-
-Required root node properties:
-
- - compatible : must contain "rda,8810pl"
-
-
-Boards:
-
-Root node property compatible must contain, depending on board:
-
- - Orange Pi 2G-IoT: "xunlong,orangepi-2g-iot"
- - Orange Pi i96: "xunlong,orangepi-i96"
diff --git a/Documentation/devicetree/bindings/arm/rda.yaml b/Documentation/devicetree/bindings/arm/rda.yaml
new file mode 100644
index 000000000000..51cec2b63b04
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/rda.yaml
@@ -0,0 +1,20 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/rda.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: RDA Micro platforms device tree bindings
+
+maintainers:
+ - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - xunlong,orangepi-2g-iot # Orange Pi 2G-IoT
+ - xunlong,orangepi-i96 # Orange Pi i96
+ - const: rda,8810pl
+
+...
diff --git a/Documentation/devicetree/bindings/common-properties.txt b/Documentation/devicetree/bindings/common-properties.txt
index a3448bfa1c82..98a28130e100 100644
--- a/Documentation/devicetree/bindings/common-properties.txt
+++ b/Documentation/devicetree/bindings/common-properties.txt
@@ -5,30 +5,29 @@ Endianness
----------
The Devicetree Specification does not define any properties related to hardware
-byteswapping, but endianness issues show up frequently in porting Linux to
+byte swapping, but endianness issues show up frequently in porting drivers to
different machine types. This document attempts to provide a consistent
-way of handling byteswapping across drivers.
+way of handling byte swapping across drivers.
Optional properties:
- big-endian: Boolean; force big endian register accesses
unconditionally (e.g. ioread32be/iowrite32be). Use this if you
- know the peripheral always needs to be accessed in BE mode.
+ know the peripheral always needs to be accessed in big endian (BE) mode.
- little-endian: Boolean; force little endian register accesses
unconditionally (e.g. readl/writel). Use this if you know the
- peripheral always needs to be accessed in LE mode.
+ peripheral always needs to be accessed in little endian (LE) mode.
- native-endian: Boolean; always use register accesses matched to the
endianness of the kernel binary (e.g. LE vmlinux -> readl/writel,
- BE vmlinux -> ioread32be/iowrite32be). In this case no byteswaps
+ BE vmlinux -> ioread32be/iowrite32be). In this case no byte swaps
will ever be performed. Use this if the hardware "self-adjusts"
register endianness based on the CPU's configured endianness.
If a binding supports these properties, then the binding should also
specify the default behavior if none of these properties are present.
In such cases, little-endian is the preferred default, but it is not
-a requirement. The of_device_is_big_endian() and of_fdt_is_big_endian()
-helper functions do assume that little-endian is the default, because
-most existing (PCI-based) drivers implicitly default to LE by using
-readl/writel for MMIO accesses.
+a requirement. Some implementations assume that little-endian is
+the default, because most existing (PCI-based) drivers implicitly
+default to LE for their MMIO accesses.
Examples:
Scenario 1 : CPU in LE mode & device in LE mode.
diff --git a/Documentation/devicetree/bindings/display/simple-framebuffer.yaml b/Documentation/devicetree/bindings/display/simple-framebuffer.yaml
index b052d76cf8b6..678776b6012a 100644
--- a/Documentation/devicetree/bindings/display/simple-framebuffer.yaml
+++ b/Documentation/devicetree/bindings/display/simple-framebuffer.yaml
@@ -126,6 +126,28 @@ required:
# but usually they will be filled by the bootloader.
- compatible
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: allwinner,simple-framebuffer
+
+ then:
+ required:
+ - allwinner,pipeline
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: amlogic,simple-framebuffer
+
+ then:
+ required:
+ - amlogic,pipeline
+
+
additionalProperties: false
examples:
@@ -139,7 +161,8 @@ examples:
#size-cells = <1>;
stdout-path = "display0";
framebuffer0: framebuffer@1d385000 {
- compatible = "simple-framebuffer";
+ compatible = "allwinner,simple-framebuffer", "simple-framebuffer";
+ allwinner,pipeline = "de_be0-lcd0";
reg = <0x1d385000 3840000>;
width = <1600>;
height = <1200>;
diff --git a/Documentation/devicetree/bindings/ipmi/npcm7xx-kcs-bmc.txt b/Documentation/devicetree/bindings/ipmi/npcm7xx-kcs-bmc.txt
index 3538a214fff1..352f5e9c759b 100644
--- a/Documentation/devicetree/bindings/ipmi/npcm7xx-kcs-bmc.txt
+++ b/Documentation/devicetree/bindings/ipmi/npcm7xx-kcs-bmc.txt
@@ -36,4 +36,4 @@ Example:
kcs_chan = <2>;
status = "disabled";
};
- }; \ No newline at end of file
+ };
diff --git a/Documentation/devicetree/bindings/leds/backlight/lm3630a-backlight.yaml b/Documentation/devicetree/bindings/leds/backlight/lm3630a-backlight.yaml
index 4d61fe0a98a4..dc129d9a329e 100644
--- a/Documentation/devicetree/bindings/leds/backlight/lm3630a-backlight.yaml
+++ b/Documentation/devicetree/bindings/leds/backlight/lm3630a-backlight.yaml
@@ -23,16 +23,17 @@ properties:
reg:
maxItems: 1
- ti,linear-mapping-mode:
- description: |
- Enable linear mapping mode. If disabled, then it will use exponential
- mapping mode in which the ramp up/down appears to have a more uniform
- transition to the human eye.
- type: boolean
+ '#address-cells':
+ const: 1
+
+ '#size-cells':
+ const: 0
required:
- compatible
- reg
+ - '#address-cells'
+ - '#size-cells'
patternProperties:
"^led@[01]$":
@@ -48,7 +49,6 @@ patternProperties:
in this property. The two current sinks can be controlled
independently with both banks, or bank A can be configured to control
both sinks with the led-sources property.
- maxItems: 1
minimum: 0
maximum: 1
@@ -73,6 +73,13 @@ patternProperties:
minimum: 0
maximum: 255
+ ti,linear-mapping-mode:
+ description: |
+ Enable linear mapping mode. If disabled, then it will use exponential
+ mapping mode in which the ramp up/down appears to have a more uniform
+ transition to the human eye.
+ type: boolean
+
required:
- reg
diff --git a/Documentation/devicetree/bindings/mtd/allwinner,sun4i-a10-nand.yaml b/Documentation/devicetree/bindings/mtd/allwinner,sun4i-a10-nand.yaml
index fbd4da3684fc..e5a411518be1 100644
--- a/Documentation/devicetree/bindings/mtd/allwinner,sun4i-a10-nand.yaml
+++ b/Documentation/devicetree/bindings/mtd/allwinner,sun4i-a10-nand.yaml
@@ -57,7 +57,6 @@ patternProperties:
"^nand@[a-f0-9]+$":
properties:
reg:
- maxItems: 1
minimum: 0
maximum: 7
diff --git a/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml b/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml
new file mode 100644
index 000000000000..792196bf4abd
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml
@@ -0,0 +1,56 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/allwinner,sun4i-a10-emac.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Allwinner A10 EMAC Ethernet Controller Device Tree Bindings
+
+allOf:
+ - $ref: "ethernet-controller.yaml#"
+
+maintainers:
+ - Chen-Yu Tsai <wens@csie.org>
+ - Maxime Ripard <maxime.ripard@bootlin.com>
+
+properties:
+ compatible:
+ const: allwinner,sun4i-a10-emac
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ allwinner,sram:
+ description: Phandle to the device SRAM
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - phy-handle
+ - allwinner,sram
+
+examples:
+ - |
+ emac: ethernet@1c0b000 {
+ compatible = "allwinner,sun4i-a10-emac";
+ reg = <0x01c0b000 0x1000>;
+ interrupts = <55>;
+ clocks = <&ahb_gates 17>;
+ phy-handle = <&phy0>;
+ allwinner,sram = <&emac_sram 1>;
+ };
+
+# FIXME: We should set it, but it would report all the generic
+# properties as additional properties.
+# additionalProperties: false
+
+...
diff --git a/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-mdio.yaml b/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-mdio.yaml
new file mode 100644
index 000000000000..df24d9d969f7
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-mdio.yaml
@@ -0,0 +1,70 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/allwinner,sun4i-a10-mdio.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Allwinner A10 MDIO Controller Device Tree Bindings
+
+maintainers:
+ - Chen-Yu Tsai <wens@csie.org>
+ - Maxime Ripard <maxime.ripard@bootlin.com>
+
+allOf:
+ - $ref: "mdio.yaml#"
+
+# Select every compatible, including the deprecated ones. This way, we
+# will be able to report a warning when we have that compatible, since
+# we will validate the node thanks to the select, but won't report it
+# as a valid value in the compatible property description
+select:
+ properties:
+ compatible:
+ enum:
+ - allwinner,sun4i-a10-mdio
+
+ # Deprecated
+ - allwinner,sun4i-mdio
+
+ required:
+ - compatible
+
+properties:
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 0
+
+ compatible:
+ const: allwinner,sun4i-a10-mdio
+
+ reg:
+ maxItems: 1
+
+ phy-supply:
+ description: PHY regulator
+
+required:
+ - compatible
+ - reg
+
+examples:
+ - |
+ mdio@1c0b080 {
+ compatible = "allwinner,sun4i-a10-mdio";
+ reg = <0x01c0b080 0x14>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ phy-supply = <&reg_emac_3v3>;
+
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ };
+ };
+
+# FIXME: We should set it, but it would report all the generic
+# properties as additional properties.
+# additionalProperties: false
+
+...
diff --git a/Documentation/devicetree/bindings/net/allwinner,sun4i-emac.txt b/Documentation/devicetree/bindings/net/allwinner,sun4i-emac.txt
deleted file mode 100644
index e98118aef5f6..000000000000
--- a/Documentation/devicetree/bindings/net/allwinner,sun4i-emac.txt
+++ /dev/null
@@ -1,19 +0,0 @@
-* Allwinner EMAC ethernet controller
-
-Required properties:
-- compatible: should be "allwinner,sun4i-a10-emac" (Deprecated:
- "allwinner,sun4i-emac")
-- reg: address and length of the register set for the device.
-- interrupts: interrupt for the device
-- phy: see ethernet.txt file in the same directory.
-- clocks: A phandle to the reference clock for this device
-
-Example:
-
-emac: ethernet@1c0b000 {
- compatible = "allwinner,sun4i-a10-emac";
- reg = <0x01c0b000 0x1000>;
- interrupts = <55>;
- clocks = <&ahb_gates 17>;
- phy = <&phy0>;
-};
diff --git a/Documentation/devicetree/bindings/net/allwinner,sun4i-mdio.txt b/Documentation/devicetree/bindings/net/allwinner,sun4i-mdio.txt
deleted file mode 100644
index ab5b8613b0ef..000000000000
--- a/Documentation/devicetree/bindings/net/allwinner,sun4i-mdio.txt
+++ /dev/null
@@ -1,27 +0,0 @@
-* Allwinner A10 MDIO Ethernet Controller interface
-
-Required properties:
-- compatible: should be "allwinner,sun4i-a10-mdio"
- (Deprecated: "allwinner,sun4i-mdio").
-- reg: address and length of the register set for the device.
-
-Optional properties:
-- phy-supply: phandle to a regulator if the PHY needs one
-
-Example at the SoC level:
-mdio@1c0b080 {
- compatible = "allwinner,sun4i-a10-mdio";
- reg = <0x01c0b080 0x14>;
- #address-cells = <1>;
- #size-cells = <0>;
-};
-
-And at the board level:
-
-mdio@1c0b080 {
- phy-supply = <&reg_emac_3v3>;
-
- phy0: ethernet-phy@0 {
- reg = <0>;
- };
-};
diff --git a/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.txt b/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.txt
deleted file mode 100644
index 8b3f953656e3..000000000000
--- a/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.txt
+++ /dev/null
@@ -1,27 +0,0 @@
-* Allwinner GMAC ethernet controller
-
-This device is a platform glue layer for stmmac.
-Please see stmmac.txt for the other unchanged properties.
-
-Required properties:
- - compatible: Should be "allwinner,sun7i-a20-gmac"
- - clocks: Should contain the GMAC main clock, and tx clock
- The tx clock type should be "allwinner,sun7i-a20-gmac-clk"
- - clock-names: Should contain the clock names "stmmaceth",
- and "allwinner_gmac_tx"
-
-Optional properties:
-- phy-supply: phandle to a regulator if the PHY needs one
-
-Examples:
-
- gmac: ethernet@1c50000 {
- compatible = "allwinner,sun7i-a20-gmac";
- reg = <0x01c50000 0x10000>,
- <0x01c20164 0x4>;
- interrupts = <0 85 1>;
- interrupt-names = "macirq";
- clocks = <&ahb_gates 49>, <&gmac_tx>;
- clock-names = "stmmaceth", "allwinner_gmac_tx";
- phy-mode = "mii";
- };
diff --git a/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml b/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml
new file mode 100644
index 000000000000..06b1cc8bea14
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml
@@ -0,0 +1,65 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/allwinner,sun7i-a20-gmac.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Allwinner A20 GMAC Device Tree Bindings
+
+allOf:
+ - $ref: "snps,dwmac.yaml#"
+
+maintainers:
+ - Chen-Yu Tsai <wens@csie.org>
+ - Maxime Ripard <maxime.ripard@bootlin.com>
+
+properties:
+ compatible:
+ const: allwinner,sun7i-a20-gmac
+
+ interrupts:
+ maxItems: 1
+
+ interrupt-names:
+ const: macirq
+
+ clocks:
+ items:
+ - description: GMAC main clock
+ - description: TX clock
+
+ clock-names:
+ items:
+ - const: stmmaceth
+ - const: allwinner_gmac_tx
+
+ phy-supply:
+ description:
+ PHY regulator
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - interrupt-names
+ - clocks
+ - clock-names
+ - phy-mode
+
+examples:
+ - |
+ gmac: ethernet@1c50000 {
+ compatible = "allwinner,sun7i-a20-gmac";
+ reg = <0x01c50000 0x10000>;
+ interrupts = <0 85 1>;
+ interrupt-names = "macirq";
+ clocks = <&ahb_gates 49>, <&gmac_tx>;
+ clock-names = "stmmaceth", "allwinner_gmac_tx";
+ phy-mode = "mii";
+ };
+
+# FIXME: We should set it, but it would report all the generic
+# properties as additional properties.
+# additionalProperties: false
+
+...
diff --git a/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml b/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml
new file mode 100644
index 000000000000..d4084c149768
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml
@@ -0,0 +1,321 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/allwinner,sun8i-a83t-gmac.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Allwinner A83t EMAC Device Tree Bindings
+
+maintainers:
+ - Chen-Yu Tsai <wens@csie.org>
+ - Maxime Ripard <maxime.ripard@bootlin.com>
+
+properties:
+ compatible:
+ oneOf:
+ - const: allwinner,sun8i-a83t-emac
+ - const: allwinner,sun8i-h3-emac
+ - const: allwinner,sun8i-r40-emac
+ - const: allwinner,sun8i-v3s-emac
+ - const: allwinner,sun50i-a64-emac
+ - items:
+ - const: allwinner,sun50i-h6-emac
+ - const: allwinner,sun50i-a64-emac
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ interrupt-names:
+ const: macirq
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ const: stmmaceth
+
+ syscon:
+ $ref: /schemas/types.yaml#definitions/phandle
+ description:
+ Phandle to the device containing the EMAC or GMAC clock
+ register
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - interrupt-names
+ - clocks
+ - clock-names
+ - resets
+ - reset-names
+ - phy-handle
+ - phy-mode
+ - syscon
+
+allOf:
+ - $ref: "snps,dwmac.yaml#"
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - allwinner,sun8i-a83t-emac
+ - allwinner,sun8i-h3-emac
+ - allwinner,sun8i-v3s-emac
+ - allwinner,sun50i-a64-emac
+
+ then:
+ properties:
+ allwinner,tx-delay-ps:
+ default: 0
+ minimum: 0
+ maximum: 700
+ multipleOf: 100
+ description:
+ External RGMII PHY TX clock delay chain value in ps.
+
+ allwinner,rx-delay-ps:
+ default: 0
+ minimum: 0
+ maximum: 3100
+ multipleOf: 100
+ description:
+ External RGMII PHY TX clock delay chain value in ps.
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - allwinner,sun8i-r40-emac
+
+ then:
+ properties:
+ allwinner,rx-delay-ps:
+ default: 0
+ minimum: 0
+ maximum: 700
+ multipleOf: 100
+ description:
+ External RGMII PHY TX clock delay chain value in ps.
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - allwinner,sun8i-h3-emac
+ - allwinner,sun8i-v3s-emac
+
+ then:
+ properties:
+ allwinner,leds-active-low:
+ $ref: /schemas/types.yaml#definitions/flag
+ description:
+ EPHY LEDs are active low.
+
+ mdio-mux:
+ type: object
+
+ properties:
+ compatible:
+ const: allwinner,sun8i-h3-mdio-mux
+
+ mdio-parent-bus:
+ $ref: /schemas/types.yaml#definitions/phandle
+ description:
+ Phandle to EMAC MDIO.
+
+ mdio@1:
+ type: object
+ description: Internal MDIO Bus
+
+ properties:
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 0
+
+ compatible:
+ const: allwinner,sun8i-h3-mdio-internal
+
+ reg:
+ const: 1
+
+ patternProperties:
+ "^ethernet-phy@[0-9a-f]$":
+ type: object
+ description:
+ Integrated PHY node
+
+ properties:
+ clocks:
+ maxItems: 1
+
+ resets:
+ maxItems: 1
+
+ required:
+ - clocks
+ - resets
+
+
+ mdio@2:
+ type: object
+ description: External MDIO Bus (H3 only)
+
+ properties:
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 0
+
+ reg:
+ const: 2
+
+ required:
+ - compatible
+ - mdio-parent-bus
+ - mdio@1
+
+examples:
+ - |
+ ethernet@1c0b000 {
+ compatible = "allwinner,sun8i-h3-emac";
+ syscon = <&syscon>;
+ reg = <0x01c0b000 0x104>;
+ interrupts = <0 82 1>;
+ interrupt-names = "macirq";
+ resets = <&ccu 12>;
+ reset-names = "stmmaceth";
+ clocks = <&ccu 27>;
+ clock-names = "stmmaceth";
+
+ phy-handle = <&int_mii_phy>;
+ phy-mode = "mii";
+ allwinner,leds-active-low;
+
+ mdio1: mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "snps,dwmac-mdio";
+ };
+
+ mdio-mux {
+ compatible = "allwinner,sun8i-h3-mdio-mux";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mdio-parent-bus = <&mdio1>;
+
+ int_mii_phy: mdio@1 {
+ compatible = "allwinner,sun8i-h3-mdio-internal";
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethernet-phy@1 {
+ reg = <1>;
+ clocks = <&ccu 67>;
+ resets = <&ccu 39>;
+ phy-is-integrated;
+ };
+ };
+
+ mdio@2 {
+ reg = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+ };
+
+ - |
+ ethernet@1c0b000 {
+ compatible = "allwinner,sun8i-h3-emac";
+ syscon = <&syscon>;
+ reg = <0x01c0b000 0x104>;
+ interrupts = <0 82 1>;
+ interrupt-names = "macirq";
+ resets = <&ccu 12>;
+ reset-names = "stmmaceth";
+ clocks = <&ccu 27>;
+ clock-names = "stmmaceth";
+
+ phy-handle = <&ext_rgmii_phy>;
+ phy-mode = "rgmii";
+ allwinner,leds-active-low;
+
+ mdio2: mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "snps,dwmac-mdio";
+ };
+
+ mdio-mux {
+ compatible = "allwinner,sun8i-h3-mdio-mux";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ mdio-parent-bus = <&mdio2>;
+
+ mdio@1 {
+ compatible = "allwinner,sun8i-h3-mdio-internal";
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethernet-phy@1 {
+ reg = <1>;
+ clocks = <&ccu 67>;
+ resets = <&ccu 39>;
+ };
+ };
+
+ mdio@2 {
+ reg = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ext_rgmii_phy: ethernet-phy@1 {
+ reg = <1>;
+ };
+ };
+ };
+ };
+
+ - |
+ ethernet@1c0b000 {
+ compatible = "allwinner,sun8i-a83t-emac";
+ syscon = <&syscon>;
+ reg = <0x01c0b000 0x104>;
+ interrupts = <0 82 1>;
+ interrupt-names = "macirq";
+ resets = <&ccu 13>;
+ reset-names = "stmmaceth";
+ clocks = <&ccu 27>;
+ clock-names = "stmmaceth";
+ phy-handle = <&ext_rgmii_phy1>;
+ phy-mode = "rgmii";
+
+ mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ext_rgmii_phy1: ethernet-phy@1 {
+ reg = <1>;
+ };
+ };
+ };
+
+# FIXME: We should set it, but it would report all the generic
+# properties as additional properties.
+# additionalProperties: false
+
+...
diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
deleted file mode 100644
index 54c66d0611cb..000000000000
--- a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
+++ /dev/null
@@ -1,201 +0,0 @@
-* Allwinner sun8i GMAC ethernet controller
-
-This device is a platform glue layer for stmmac.
-Please see stmmac.txt for the other unchanged properties.
-
-Required properties:
-- compatible: must be one of the following string:
- "allwinner,sun8i-a83t-emac"
- "allwinner,sun8i-h3-emac"
- "allwinner,sun8i-r40-gmac"
- "allwinner,sun8i-v3s-emac"
- "allwinner,sun50i-a64-emac"
- "allwinner,sun50i-h6-emac", "allwinner-sun50i-a64-emac"
-- reg: address and length of the register for the device.
-- interrupts: interrupt for the device
-- interrupt-names: must be "macirq"
-- clocks: A phandle to the reference clock for this device
-- clock-names: must be "stmmaceth"
-- resets: A phandle to the reset control for this device
-- reset-names: must be "stmmaceth"
-- phy-mode: See ethernet.txt
-- phy-handle: See ethernet.txt
-- syscon: A phandle to the device containing the EMAC or GMAC clock register
-
-Optional properties:
-- allwinner,tx-delay-ps: TX clock delay chain value in ps.
- Range is 0-700. Default is 0.
- Unavailable for allwinner,sun8i-r40-gmac
-- allwinner,rx-delay-ps: RX clock delay chain value in ps.
- Range is 0-3100. Default is 0.
- Range is 0-700 for allwinner,sun8i-r40-gmac
-Both delay properties need to be a multiple of 100. They control the
-clock delay for external RGMII PHY. They do not apply to the internal
-PHY or external non-RGMII PHYs.
-
-Optional properties for the following compatibles:
- - "allwinner,sun8i-h3-emac",
- - "allwinner,sun8i-v3s-emac":
-- allwinner,leds-active-low: EPHY LEDs are active low
-
-Required child node of emac:
-- mdio bus node: should be named mdio with compatible "snps,dwmac-mdio"
-
-Required properties of the mdio node:
-- #address-cells: shall be 1
-- #size-cells: shall be 0
-
-The device node referenced by "phy" or "phy-handle" must be a child node
-of the mdio node. See phy.txt for the generic PHY bindings.
-
-The following compatibles require that the emac node have a mdio-mux child
-node called "mdio-mux":
- - "allwinner,sun8i-h3-emac"
- - "allwinner,sun8i-v3s-emac":
-Required properties for the mdio-mux node:
- - compatible = "allwinner,sun8i-h3-mdio-mux"
- - mdio-parent-bus: a phandle to EMAC mdio
- - one child mdio for the integrated mdio with the compatible
- "allwinner,sun8i-h3-mdio-internal"
- - one child mdio for the external mdio if present (V3s have none)
-Required properties for the mdio-mux children node:
- - reg: 1 for internal MDIO bus, 2 for external MDIO bus
-
-The following compatibles require a PHY node representing the integrated
-PHY, under the integrated MDIO bus node if an mdio-mux node is used:
- - "allwinner,sun8i-h3-emac",
- - "allwinner,sun8i-v3s-emac":
-
-Additional information regarding generic multiplexer properties can be found
-at Documentation/devicetree/bindings/net/mdio-mux.txt
-
-Required properties of the integrated phy node:
-- clocks: a phandle to the reference clock for the EPHY
-- resets: a phandle to the reset control for the EPHY
-- Must be a child of the integrated mdio
-
-Example with integrated PHY:
-emac: ethernet@1c0b000 {
- compatible = "allwinner,sun8i-h3-emac";
- syscon = <&syscon>;
- reg = <0x01c0b000 0x104>;
- interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "macirq";
- resets = <&ccu RST_BUS_EMAC>;
- reset-names = "stmmaceth";
- clocks = <&ccu CLK_BUS_EMAC>;
- clock-names = "stmmaceth";
-
- phy-handle = <&int_mii_phy>;
- phy-mode = "mii";
- allwinner,leds-active-low;
-
- mdio: mdio {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "snps,dwmac-mdio";
- };
-
- mdio-mux {
- compatible = "mdio-mux", "allwinner,sun8i-h3-mdio-mux";
- #address-cells = <1>;
- #size-cells = <0>;
-
- mdio-parent-bus = <&mdio>;
-
- int_mdio: mdio@1 {
- compatible = "allwinner,sun8i-h3-mdio-internal";
- reg = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
- int_mii_phy: ethernet-phy@1 {
- reg = <1>;
- clocks = <&ccu CLK_BUS_EPHY>;
- resets = <&ccu RST_BUS_EPHY>;
- phy-is-integrated;
- };
- };
- ext_mdio: mdio@2 {
- reg = <2>;
- #address-cells = <1>;
- #size-cells = <0>;
- };
- };
-};
-
-Example with external PHY:
-emac: ethernet@1c0b000 {
- compatible = "allwinner,sun8i-h3-emac";
- syscon = <&syscon>;
- reg = <0x01c0b000 0x104>;
- interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "macirq";
- resets = <&ccu RST_BUS_EMAC>;
- reset-names = "stmmaceth";
- clocks = <&ccu CLK_BUS_EMAC>;
- clock-names = "stmmaceth";
-
- phy-handle = <&ext_rgmii_phy>;
- phy-mode = "rgmii";
- allwinner,leds-active-low;
-
- mdio: mdio {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "snps,dwmac-mdio";
- };
-
- mdio-mux {
- compatible = "allwinner,sun8i-h3-mdio-mux";
- #address-cells = <1>;
- #size-cells = <0>;
-
- mdio-parent-bus = <&mdio>;
-
- int_mdio: mdio@1 {
- compatible = "allwinner,sun8i-h3-mdio-internal";
- reg = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
- int_mii_phy: ethernet-phy@1 {
- reg = <1>;
- clocks = <&ccu CLK_BUS_EPHY>;
- resets = <&ccu RST_BUS_EPHY>;
- };
- };
- ext_mdio: mdio@2 {
- reg = <2>;
- #address-cells = <1>;
- #size-cells = <0>;
- ext_rgmii_phy: ethernet-phy@1 {
- reg = <1>;
- };
- }:
- };
-};
-
-Example with SoC without integrated PHY
-
-emac: ethernet@1c0b000 {
- compatible = "allwinner,sun8i-a83t-emac";
- syscon = <&syscon>;
- reg = <0x01c0b000 0x104>;
- interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "macirq";
- resets = <&ccu RST_BUS_EMAC>;
- reset-names = "stmmaceth";
- clocks = <&ccu CLK_BUS_EMAC>;
- clock-names = "stmmaceth";
-
- phy-handle = <&ext_rgmii_phy>;
- phy-mode = "rgmii";
-
- mdio: mdio {
- compatible = "snps,dwmac-mdio";
- #address-cells = <1>;
- #size-cells = <0>;
- ext_rgmii_phy: ethernet-phy@1 {
- reg = <1>;
- };
- };
-};
diff --git a/Documentation/devicetree/bindings/net/ethernet-controller.yaml b/Documentation/devicetree/bindings/net/ethernet-controller.yaml
new file mode 100644
index 000000000000..0e7c31794ae6
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/ethernet-controller.yaml
@@ -0,0 +1,206 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/ethernet-controller.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Ethernet Controller Generic Binding
+
+maintainers:
+ - David S. Miller <davem@davemloft.net>
+
+properties:
+ $nodename:
+ pattern: "^ethernet(@.*)?$"
+
+ local-mac-address:
+ allOf:
+ - $ref: /schemas/types.yaml#definitions/uint8-array
+ - items:
+ - minItems: 6
+ maxItems: 6
+ description:
+ Specifies the MAC address that was assigned to the network device.
+
+ mac-address:
+ allOf:
+ - $ref: /schemas/types.yaml#definitions/uint8-array
+ - items:
+ - minItems: 6
+ maxItems: 6
+ description:
+ Specifies the MAC address that was last used by the boot
+ program; should be used in cases where the MAC address assigned
+ to the device by the boot program is different from the
+ local-mac-address property.
+
+ max-frame-size:
+ $ref: /schemas/types.yaml#definitions/uint32
+ description:
+ Maximum transfer unit (IEEE defined MTU), rather than the
+ maximum frame size (there\'s contradiction in the Devicetree
+ Specification).
+
+ max-speed:
+ $ref: /schemas/types.yaml#definitions/uint32
+ description:
+ Specifies maximum speed in Mbit/s supported by the device.
+
+ nvmem-cells:
+ maxItems: 1
+ description:
+ Reference to an nvmem node for the MAC address
+
+ nvmem-cells-names:
+ const: mac-address
+
+ phy-connection-type:
+ description:
+ Operation mode of the PHY interface
+ enum:
+ # There is not a standard bus between the MAC and the PHY,
+ # something proprietary is being used to embed the PHY in the
+ # MAC.
+ - internal
+ - mii
+ - gmii
+ - sgmii
+ - qsgmii
+ - tbi
+ - rev-mii
+ - rmii
+
+ # RX and TX delays are added by the MAC when required
+ - rgmii
+
+ # RGMII with internal RX and TX delays provided by the PHY,
+ # the MAC should not add the RX or TX delays in this case
+ - rgmii-id
+
+ # RGMII with internal RX delay provided by the PHY, the MAC
+ # should not add an RX delay in this case
+ - rgmii-rxid
+
+ # RGMII with internal TX delay provided by the PHY, the MAC
+ # should not add an TX delay in this case
+ - rgmii-txid
+ - rtbi
+ - smii
+ - xgmii
+ - trgmii
+ - 1000base-x
+ - 2500base-x
+ - rxaui
+ - xaui
+
+ # 10GBASE-KR, XFI, SFI
+ - 10gbase-kr
+ - usxgmii
+
+ phy-mode:
+ $ref: "#/properties/phy-connection-type"
+
+ phy-handle:
+ $ref: /schemas/types.yaml#definitions/phandle
+ description:
+ Specifies a reference to a node representing a PHY device.
+
+ phy:
+ $ref: "#/properties/phy-handle"
+ deprecated: true
+
+ phy-device:
+ $ref: "#/properties/phy-handle"
+ deprecated: true
+
+ rx-fifo-depth:
+ $ref: /schemas/types.yaml#definitions/uint32
+ description:
+ The size of the controller\'s receive fifo in bytes. This is used
+ for components that can have configurable receive fifo sizes,
+ and is useful for determining certain configuration settings
+ such as flow control thresholds.
+
+ tx-fifo-depth:
+ $ref: /schemas/types.yaml#definitions/uint32
+ description:
+ The size of the controller\'s transmit fifo in bytes. This
+ is used for components that can have configurable fifo sizes.
+
+ managed:
+ allOf:
+ - $ref: /schemas/types.yaml#definitions/string
+ - default: auto
+ enum:
+ - auto
+ - in-band-status
+ description:
+ Specifies the PHY management type. If auto is set and fixed-link
+ is not specified, it uses MDIO for management.
+
+ fixed-link:
+ allOf:
+ - if:
+ type: array
+ then:
+ deprecated: true
+ minItems: 1
+ maxItems: 1
+ items:
+ items:
+ - minimum: 0
+ maximum: 31
+ description:
+ Emulated PHY ID, choose any but unique to the all
+ specified fixed-links
+
+ - enum: [0, 1]
+ description:
+ Duplex configuration. 0 for half duplex or 1 for
+ full duplex
+
+ - enum: [10, 100, 1000]
+ description:
+ Link speed in Mbits/sec.
+
+ - enum: [0, 1]
+ description:
+ Pause configuration. 0 for no pause, 1 for pause
+
+ - enum: [0, 1]
+ description:
+ Asymmetric pause configuration. 0 for no asymmetric
+ pause, 1 for asymmetric pause
+
+
+ - if:
+ type: object
+ then:
+ properties:
+ speed:
+ allOf:
+ - $ref: /schemas/types.yaml#definitions/uint32
+ - enum: [10, 100, 1000]
+ description:
+ Link speed.
+
+ full-duplex:
+ $ref: /schemas/types.yaml#definitions/flag
+ description:
+ Indicates that full-duplex is used. When absent, half
+ duplex is assumed.
+
+ asym-pause:
+ $ref: /schemas/types.yaml#definitions/flag
+ description:
+ Indicates that asym_pause should be enabled.
+
+ link-gpios:
+ maxItems: 1
+ description:
+ GPIO to determine if the link is up
+
+ required:
+ - speed
+
+...
diff --git a/Documentation/devicetree/bindings/net/ethernet-phy.yaml b/Documentation/devicetree/bindings/net/ethernet-phy.yaml
new file mode 100644
index 000000000000..f70f18ff821f
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/ethernet-phy.yaml
@@ -0,0 +1,177 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/ethernet-phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Ethernet PHY Generic Binding
+
+maintainers:
+ - Andrew Lunn <andrew@lunn.ch>
+ - Florian Fainelli <f.fainelli@gmail.com>
+ - Heiner Kallweit <hkallweit1@gmail.com>
+
+# The dt-schema tools will generate a select statement first by using
+# the compatible, and second by using the node name if any. In our
+# case, the node name is the one we want to match on, while the
+# compatible is optional.
+select:
+ properties:
+ $nodename:
+ pattern: "^ethernet-phy(@[a-f0-9]+)?$"
+
+ required:
+ - $nodename
+
+properties:
+ $nodename:
+ pattern: "^ethernet-phy(@[a-f0-9]+)?$"
+
+ compatible:
+ oneOf:
+ - const: ethernet-phy-ieee802.3-c22
+ description: PHYs that implement IEEE802.3 clause 22
+ - const: ethernet-phy-ieee802.3-c45
+ description: PHYs that implement IEEE802.3 clause 45
+ - pattern: "^ethernet-phy-id[a-f0-9]{4}\\.[a-f0-9]{4}$"
+ description:
+ If the PHY reports an incorrect ID (or none at all) then the
+ compatible list may contain an entry with the correct PHY ID
+ in the above form.
+ The first group of digits is the 16 bit Phy Identifier 1
+ register, this is the chip vendor OUI bits 3:18. The
+ second group of digits is the Phy Identifier 2 register,
+ this is the chip vendor OUI bits 19:24, followed by 10
+ bits of a vendor specific ID.
+ - items:
+ - pattern: "^ethernet-phy-id[a-f0-9]{4}\\.[a-f0-9]{4}$"
+ - const: ethernet-phy-ieee802.3-c45
+
+ reg:
+ minimum: 0
+ maximum: 31
+ description:
+ The ID number for the PHY.
+
+ interrupts:
+ maxItems: 1
+
+ max-speed:
+ enum:
+ - 10
+ - 100
+ - 1000
+ - 2500
+ - 5000
+ - 10000
+ - 20000
+ - 25000
+ - 40000
+ - 50000
+ - 56000
+ - 100000
+ - 200000
+ description:
+ Maximum PHY supported speed in Mbits / seconds.
+
+ broken-turn-around:
+ $ref: /schemas/types.yaml#definitions/flag
+ description:
+ If set, indicates the PHY device does not correctly release
+ the turn around line low at the end of a MDIO transaction.
+
+ enet-phy-lane-swap:
+ $ref: /schemas/types.yaml#definitions/flag
+ description:
+ If set, indicates the PHY will swap the TX/RX lanes to
+ compensate for the board being designed with the lanes
+ swapped.
+
+ eee-broken-100tx:
+ $ref: /schemas/types.yaml#definitions/flag
+ description:
+ Mark the corresponding energy efficient ethernet mode as
+ broken and request the ethernet to stop advertising it.
+
+ eee-broken-1000t:
+ $ref: /schemas/types.yaml#definitions/flag
+ description:
+ Mark the corresponding energy efficient ethernet mode as
+ broken and request the ethernet to stop advertising it.
+
+ eee-broken-10gt:
+ $ref: /schemas/types.yaml#definitions/flag
+ description:
+ Mark the corresponding energy efficient ethernet mode as
+ broken and request the ethernet to stop advertising it.
+
+ eee-broken-1000kx:
+ $ref: /schemas/types.yaml#definitions/flag
+ description:
+ Mark the corresponding energy efficient ethernet mode as
+ broken and request the ethernet to stop advertising it.
+
+ eee-broken-10gkx4:
+ $ref: /schemas/types.yaml#definitions/flag
+ description:
+ Mark the corresponding energy efficient ethernet mode as
+ broken and request the ethernet to stop advertising it.
+
+ eee-broken-10gkr:
+ $ref: /schemas/types.yaml#definitions/flag
+ description:
+ Mark the corresponding energy efficient ethernet mode as
+ broken and request the ethernet to stop advertising it.
+
+ phy-is-integrated:
+ $ref: /schemas/types.yaml#definitions/flag
+ description:
+ If set, indicates that the PHY is integrated into the same
+ physical package as the Ethernet MAC. If needed, muxers
+ should be configured to ensure the integrated PHY is
+ used. The absence of this property indicates the muxers
+ should be configured so that the external PHY is used.
+
+ resets:
+ maxItems: 1
+
+ reset-names:
+ const: phy
+
+ reset-gpios:
+ maxItems: 1
+ description:
+ The GPIO phandle and specifier for the PHY reset signal.
+
+ reset-assert-us:
+ description:
+ Delay after the reset was asserted in microseconds. If this
+ property is missing the delay will be skipped.
+
+ reset-deassert-us:
+ description:
+ Delay after the reset was deasserted in microseconds. If
+ this property is missing the delay will be skipped.
+
+required:
+ - reg
+
+examples:
+ - |
+ ethernet {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethernet-phy@0 {
+ compatible = "ethernet-phy-id0141.0e90", "ethernet-phy-ieee802.3-c45";
+ interrupt-parent = <&PIC>;
+ interrupts = <35 1>;
+ reg = <0>;
+
+ resets = <&rst 8>;
+ reset-names = "phy";
+ reset-gpios = <&gpio1 4 1>;
+ reset-assert-us = <1000>;
+ reset-deassert-us = <2000>;
+ };
+ };
diff --git a/Documentation/devicetree/bindings/net/ethernet.txt b/Documentation/devicetree/bindings/net/ethernet.txt
index 5475682bf06e..5df413d01be2 100644
--- a/Documentation/devicetree/bindings/net/ethernet.txt
+++ b/Documentation/devicetree/bindings/net/ethernet.txt
@@ -1,68 +1 @@
-The following properties are common to the Ethernet controllers:
-
-NOTE: All 'phy*' properties documented below are Ethernet specific. For the
-generic PHY 'phys' property, see
-Documentation/devicetree/bindings/phy/phy-bindings.txt.
-
-- mac-address: array of 6 bytes, specifies the MAC address that was last used by
- the boot program; should be used in cases where the MAC address assigned to
- the device by the boot program is different from the "local-mac-address"
- property;
-- local-mac-address: array of 6 bytes, specifies the MAC address that was
- assigned to the network device;
-- nvmem-cells: phandle, reference to an nvmem node for the MAC address
-- nvmem-cell-names: string, should be "mac-address" if nvmem is to be used
-- max-speed: number, specifies maximum speed in Mbit/s supported by the device;
-- max-frame-size: number, maximum transfer unit (IEEE defined MTU), rather than
- the maximum frame size (there's contradiction in the Devicetree
- Specification).
-- phy-mode: string, operation mode of the PHY interface. This is now a de-facto
- standard property; supported values are:
- * "internal" (Internal means there is not a standard bus between the MAC and
- the PHY, something proprietary is being used to embed the PHY in the MAC.)
- * "mii"
- * "gmii"
- * "sgmii"
- * "qsgmii"
- * "tbi"
- * "rev-mii"
- * "rmii"
- * "rgmii" (RX and TX delays are added by the MAC when required)
- * "rgmii-id" (RGMII with internal RX and TX delays provided by the PHY, the
- MAC should not add the RX or TX delays in this case)
- * "rgmii-rxid" (RGMII with internal RX delay provided by the PHY, the MAC
- should not add an RX delay in this case)
- * "rgmii-txid" (RGMII with internal TX delay provided by the PHY, the MAC
- should not add an TX delay in this case)
- * "rtbi"
- * "smii"
- * "xgmii"
- * "trgmii"
- * "1000base-x",
- * "2500base-x",
- * "rxaui"
- * "xaui"
- * "10gbase-kr" (10GBASE-KR, XFI, SFI)
- * "usxgmii"
-- phy-connection-type: the same as "phy-mode" property but described in the
- Devicetree Specification;
-- phy-handle: phandle, specifies a reference to a node representing a PHY
- device; this property is described in the Devicetree Specification and so
- preferred;
-- phy: the same as "phy-handle" property, not recommended for new bindings.
-- phy-device: the same as "phy-handle" property, not recommended for new
- bindings.
-- rx-fifo-depth: the size of the controller's receive fifo in bytes. This
- is used for components that can have configurable receive fifo sizes,
- and is useful for determining certain configuration settings such as
- flow control thresholds.
-- tx-fifo-depth: the size of the controller's transmit fifo in bytes. This
- is used for components that can have configurable fifo sizes.
-- managed: string, specifies the PHY management type. Supported values are:
- "auto", "in-band-status". "auto" is the default, it usess MDIO for
- management if fixed-link is not specified.
-
-Child nodes of the Ethernet controller are typically the individual PHY devices
-connected via the MDIO bus (sometimes the MDIO bus controller is separate).
-They are described in the phy.txt file in this same directory.
-For non-MDIO PHY management see fixed-link.txt.
+This file has moved to ethernet-controller.yaml.
diff --git a/Documentation/devicetree/bindings/net/fixed-link.txt b/Documentation/devicetree/bindings/net/fixed-link.txt
index ec5d889fe3d8..5df413d01be2 100644
--- a/Documentation/devicetree/bindings/net/fixed-link.txt
+++ b/Documentation/devicetree/bindings/net/fixed-link.txt
@@ -1,54 +1 @@
-Fixed link Device Tree binding
-------------------------------
-
-Some Ethernet MACs have a "fixed link", and are not connected to a
-normal MDIO-managed PHY device. For those situations, a Device Tree
-binding allows to describe a "fixed link".
-
-Such a fixed link situation is described by creating a 'fixed-link'
-sub-node of the Ethernet MAC device node, with the following
-properties:
-
-* 'speed' (integer, mandatory), to indicate the link speed. Accepted
- values are 10, 100 and 1000
-* 'full-duplex' (boolean, optional), to indicate that full duplex is
- used. When absent, half duplex is assumed.
-* 'pause' (boolean, optional), to indicate that pause should be
- enabled.
-* 'asym-pause' (boolean, optional), to indicate that asym_pause should
- be enabled.
-* 'link-gpios' ('gpio-list', optional), to indicate if a gpio can be read
- to determine if the link is up.
-
-Old, deprecated 'fixed-link' binding:
-
-* A 'fixed-link' property in the Ethernet MAC node, with 5 cells, of the
- form <a b c d e> with the following accepted values:
- - a: emulated PHY ID, choose any but but unique to the all specified
- fixed-links, from 0 to 31
- - b: duplex configuration: 0 for half duplex, 1 for full duplex
- - c: link speed in Mbits/sec, accepted values are: 10, 100 and 1000
- - d: pause configuration: 0 for no pause, 1 for pause
- - e: asymmetric pause configuration: 0 for no asymmetric pause, 1 for
- asymmetric pause
-
-Examples:
-
-ethernet@0 {
- ...
- fixed-link {
- speed = <1000>;
- full-duplex;
- };
- ...
-};
-
-ethernet@1 {
- ...
- fixed-link {
- speed = <1000>;
- pause;
- link-gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
- };
- ...
-};
+This file has moved to ethernet-controller.yaml.
diff --git a/Documentation/devicetree/bindings/net/mdio.txt b/Documentation/devicetree/bindings/net/mdio.txt
index e3e1603f256c..cf8a0105488e 100644
--- a/Documentation/devicetree/bindings/net/mdio.txt
+++ b/Documentation/devicetree/bindings/net/mdio.txt
@@ -1,37 +1 @@
-Common MDIO bus properties.
-
-These are generic properties that can apply to any MDIO bus.
-
-Optional properties:
-- reset-gpios: One GPIO that control the RESET lines of all PHYs on that MDIO
- bus.
-- reset-delay-us: RESET pulse width in microseconds.
-
-A list of child nodes, one per device on the bus is expected. These
-should follow the generic phy.txt, or a device specific binding document.
-
-The 'reset-delay-us' indicates the RESET signal pulse width in microseconds and
-applies to all PHY devices. It must therefore be appropriately determined based
-on all PHY requirements (maximum value of all per-PHY RESET pulse widths).
-
-Example :
-This example shows these optional properties, plus other properties
-required for the TI Davinci MDIO driver.
-
- davinci_mdio: ethernet@5c030000 {
- compatible = "ti,davinci_mdio";
- reg = <0x5c030000 0x1000>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
- reset-delay-us = <2>;
-
- ethphy0: ethernet-phy@1 {
- reg = <1>;
- };
-
- ethphy1: ethernet-phy@3 {
- reg = <3>;
- };
- };
+This file has moved to mdio.yaml.
diff --git a/Documentation/devicetree/bindings/net/mdio.yaml b/Documentation/devicetree/bindings/net/mdio.yaml
new file mode 100644
index 000000000000..5d08d2ffd4eb
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/mdio.yaml
@@ -0,0 +1,74 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/mdio.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MDIO Bus Generic Binding
+
+maintainers:
+ - Andrew Lunn <andrew@lunn.ch>
+ - Florian Fainelli <f.fainelli@gmail.com>
+ - Heiner Kallweit <hkallweit1@gmail.com>
+
+description:
+ These are generic properties that can apply to any MDIO bus. Any
+ MDIO bus must have a list of child nodes, one per device on the
+ bus. These should follow the generic ethernet-phy.yaml document, or
+ a device specific binding document.
+
+properties:
+ $nodename:
+ pattern: "^mdio(@.*)?"
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 0
+
+ reset-gpios:
+ maxItems: 1
+ description:
+ The phandle and specifier for the GPIO that controls the RESET
+ lines of all PHYs on that MDIO bus.
+
+ reset-delay-us:
+ description:
+ RESET pulse width in microseconds. It applies to all PHY devices
+ and must therefore be appropriately determined based on all PHY
+ requirements (maximum value of all per-PHY RESET pulse widths).
+
+patternProperties:
+ "^ethernet-phy@[0-9a-f]+$":
+ type: object
+
+ properties:
+ reg:
+ minimum: 0
+ maximum: 31
+ description:
+ The ID number for the PHY.
+
+ required:
+ - reg
+
+examples:
+ - |
+ davinci_mdio: mdio@5c030000 {
+ compatible = "ti,davinci_mdio";
+ reg = <0x5c030000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reset-gpios = <&gpio2 5 1>;
+ reset-delay-us = <2>;
+
+ ethphy0: ethernet-phy@1 {
+ reg = <1>;
+ };
+
+ ethphy1: ethernet-phy@3 {
+ reg = <3>;
+ };
+ };
diff --git a/Documentation/devicetree/bindings/net/phy.txt b/Documentation/devicetree/bindings/net/phy.txt
index 9b9e5b1765dd..2399ee60caed 100644
--- a/Documentation/devicetree/bindings/net/phy.txt
+++ b/Documentation/devicetree/bindings/net/phy.txt
@@ -1,79 +1 @@
-PHY nodes
-
-Required properties:
-
- - interrupts : interrupt specifier for the sole interrupt.
- - reg : The ID number for the phy, usually a small integer
-
-Optional Properties:
-
-- compatible: Compatible list, may contain
- "ethernet-phy-ieee802.3-c22" or "ethernet-phy-ieee802.3-c45" for
- PHYs that implement IEEE802.3 clause 22 or IEEE802.3 clause 45
- specifications. If neither of these are specified, the default is to
- assume clause 22.
-
- If the PHY reports an incorrect ID (or none at all) then the
- "compatible" list may contain an entry with the correct PHY ID in the
- form: "ethernet-phy-idAAAA.BBBB" where
- AAAA - The value of the 16 bit Phy Identifier 1 register as
- 4 hex digits. This is the chip vendor OUI bits 3:18
- BBBB - The value of the 16 bit Phy Identifier 2 register as
- 4 hex digits. This is the chip vendor OUI bits 19:24,
- followed by 10 bits of a vendor specific ID.
-
- The compatible list should not contain other values than those
- listed here.
-
-- max-speed: Maximum PHY supported speed (10, 100, 1000...)
-
-- broken-turn-around: If set, indicates the PHY device does not correctly
- release the turn around line low at the end of a MDIO transaction.
-
-- enet-phy-lane-swap: If set, indicates the PHY will swap the TX/RX lanes to
- compensate for the board being designed with the lanes swapped.
-
-- enet-phy-lane-no-swap: If set, indicates that PHY will disable swap of the
- TX/RX lanes. This property allows the PHY to work correcly after e.g. wrong
- bootstrap configuration caused by issues in PCB layout design.
-
-- eee-broken-100tx:
-- eee-broken-1000t:
-- eee-broken-10gt:
-- eee-broken-1000kx:
-- eee-broken-10gkx4:
-- eee-broken-10gkr:
- Mark the corresponding energy efficient ethernet mode as broken and
- request the ethernet to stop advertising it.
-
-- phy-is-integrated: If set, indicates that the PHY is integrated into the same
- physical package as the Ethernet MAC. If needed, muxers should be configured
- to ensure the integrated PHY is used. The absence of this property indicates
- the muxers should be configured so that the external PHY is used.
-
-- resets: The reset-controller phandle and specifier for the PHY reset signal.
-
-- reset-names: Must be "phy" for the PHY reset signal.
-
-- reset-gpios: The GPIO phandle and specifier for the PHY reset signal.
-
-- reset-assert-us: Delay after the reset was asserted in microseconds.
- If this property is missing the delay will be skipped.
-
-- reset-deassert-us: Delay after the reset was deasserted in microseconds.
- If this property is missing the delay will be skipped.
-
-Example:
-
-ethernet-phy@0 {
- compatible = "ethernet-phy-id0141.0e90", "ethernet-phy-ieee802.3-c22";
- interrupt-parent = <&PIC>;
- interrupts = <35 IRQ_TYPE_EDGE_RISING>;
- reg = <0>;
-
- resets = <&rst 8>;
- reset-names = "phy";
- reset-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
- reset-assert-us = <1000>;
- reset-deassert-us = <2000>;
-};
+This file has moved to ethernet-phy.yaml.
diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
new file mode 100644
index 000000000000..76fea2be66ac
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
@@ -0,0 +1,411 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/snps,dwmac.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Synopsys DesignWare MAC Device Tree Bindings
+
+maintainers:
+ - Alexandre Torgue <alexandre.torgue@st.com>
+ - Giuseppe Cavallaro <peppe.cavallaro@st.com>
+ - Jose Abreu <joabreu@synopsys.com>
+
+# Select every compatible, including the deprecated ones. This way, we
+# will be able to report a warning when we have that compatible, since
+# we will validate the node thanks to the select, but won't report it
+# as a valid value in the compatible property description
+select:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - snps,dwmac
+ - snps,dwmac-3.50a
+ - snps,dwmac-3.610
+ - snps,dwmac-3.70a
+ - snps,dwmac-3.710
+ - snps,dwmac-4.00
+ - snps,dwmac-4.10a
+ - snps,dwxgmac
+ - snps,dwxgmac-2.10
+
+ # Deprecated
+ - st,spear600-gmac
+
+ required:
+ - compatible
+
+properties:
+
+ # We need to include all the compatibles from schemas that will
+ # include that schemas, otherwise compatible won't validate for
+ # those.
+ compatible:
+ contains:
+ enum:
+ - allwinner,sun7i-a20-gmac
+ - allwinner,sun8i-a83t-emac
+ - allwinner,sun8i-h3-emac
+ - allwinner,sun8i-r40-emac
+ - allwinner,sun8i-v3s-emac
+ - allwinner,sun50i-a64-emac
+ - snps,dwmac
+ - snps,dwmac-3.50a
+ - snps,dwmac-3.610
+ - snps,dwmac-3.70a
+ - snps,dwmac-3.710
+ - snps,dwmac-4.00
+ - snps,dwmac-4.10a
+ - snps,dwxgmac
+ - snps,dwxgmac-2.10
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ minItems: 1
+ maxItems: 3
+ items:
+ - description: Combined signal for various interrupt events
+ - description: The interrupt to manage the remote wake-up packet detection
+ - description: The interrupt that occurs when Rx exits the LPI state
+
+ interrupt-names:
+ minItems: 1
+ maxItems: 3
+ items:
+ - const: macirq
+ - const: eth_wake_irq
+ - const: eth_lpi
+
+ clocks:
+ minItems: 1
+ maxItems: 3
+ items:
+ - description: GMAC main clock
+ - description: Peripheral registers interface clock
+ - description:
+ PTP reference clock. This clock is used for programming the
+ Timestamp Addend Register. If not passed then the system
+ clock will be used and this is fine on some platforms.
+
+ clock-names:
+ additionalItems: true
+ contains:
+ enum:
+ - stmmaceth
+ - pclk
+ - ptp_ref
+
+ resets:
+ maxItems: 1
+ description:
+ MAC Reset signal.
+
+ reset-names:
+ const: stmmaceth
+
+ snps,axi-config:
+ $ref: /schemas/types.yaml#definitions/phandle
+ description:
+ AXI BUS Mode parameters. Phandle to a node that can contain the
+ following properties
+ * snps,lpi_en, enable Low Power Interface
+ * snps,xit_frm, unlock on WoL
+ * snps,wr_osr_lmt, max write outstanding req. limit
+ * snps,rd_osr_lmt, max read outstanding req. limit
+ * snps,kbbe, do not cross 1KiB boundary.
+ * snps,blen, this is a vector of supported burst length.
+ * snps,fb, fixed-burst
+ * snps,mb, mixed-burst
+ * snps,rb, rebuild INCRx Burst
+
+ snps,mtl-rx-config:
+ $ref: /schemas/types.yaml#definitions/phandle
+ description:
+ Multiple RX Queues parameters. Phandle to a node that can
+ contain the following properties
+ * snps,rx-queues-to-use, number of RX queues to be used in the
+ driver
+ * Choose one of these RX scheduling algorithms
+ * snps,rx-sched-sp, Strict priority
+ * snps,rx-sched-wsp, Weighted Strict priority
+ * For each RX queue
+ * Choose one of these modes
+ * snps,dcb-algorithm, Queue to be enabled as DCB
+ * snps,avb-algorithm, Queue to be enabled as AVB
+ * snps,map-to-dma-channel, Channel to map
+ * Specifiy specific packet routing
+ * snps,route-avcp, AV Untagged Control packets
+ * snps,route-ptp, PTP Packets
+ * snps,route-dcbcp, DCB Control Packets
+ * snps,route-up, Untagged Packets
+ * snps,route-multi-broad, Multicast & Broadcast Packets
+ * snps,priority, RX queue priority (Range 0x0 to 0xF)
+
+ snps,mtl-tx-config:
+ $ref: /schemas/types.yaml#definitions/phandle
+ description:
+ Multiple TX Queues parameters. Phandle to a node that can
+ contain the following properties
+ * snps,tx-queues-to-use, number of TX queues to be used in the
+ driver
+ * Choose one of these TX scheduling algorithms
+ * snps,tx-sched-wrr, Weighted Round Robin
+ * snps,tx-sched-wfq, Weighted Fair Queuing
+ * snps,tx-sched-dwrr, Deficit Weighted Round Robin
+ * snps,tx-sched-sp, Strict priority
+ * For each TX queue
+ * snps,weight, TX queue weight (if using a DCB weight
+ algorithm)
+ * Choose one of these modes
+ * snps,dcb-algorithm, TX queue will be working in DCB
+ * snps,avb-algorithm, TX queue will be working in AVB
+ [Attention] Queue 0 is reserved for legacy traffic
+ and so no AVB is available in this queue.
+ * Configure Credit Base Shaper (if AVB Mode selected)
+ * snps,send_slope, enable Low Power Interface
+ * snps,idle_slope, unlock on WoL
+ * snps,high_credit, max write outstanding req. limit
+ * snps,low_credit, max read outstanding req. limit
+ * snps,priority, TX queue priority (Range 0x0 to 0xF)
+
+ snps,reset-gpio:
+ deprecated: true
+ maxItems: 1
+ description:
+ PHY Reset GPIO
+
+ snps,reset-active-low:
+ deprecated: true
+ $ref: /schemas/types.yaml#definitions/flag
+ description:
+ Indicates that the PHY Reset is active low
+
+ snps,reset-delays-us:
+ deprecated: true
+ allOf:
+ - $ref: /schemas/types.yaml#definitions/uint32-array
+ - minItems: 3
+ maxItems: 3
+ description:
+ Triplet of delays. The 1st cell is reset pre-delay in micro
+ seconds. The 2nd cell is reset pulse in micro seconds. The 3rd
+ cell is reset post-delay in micro seconds.
+
+ snps,aal:
+ $ref: /schemas/types.yaml#definitions/flag
+ description:
+ Use Address-Aligned Beats
+
+ snps,fixed-burst:
+ $ref: /schemas/types.yaml#definitions/flag
+ description:
+ Program the DMA to use the fixed burst mode
+
+ snps,mixed-burst:
+ $ref: /schemas/types.yaml#definitions/flag
+ description:
+ Program the DMA to use the mixed burst mode
+
+ snps,force_thresh_dma_mode:
+ $ref: /schemas/types.yaml#definitions/flag
+ description:
+ Force DMA to use the threshold mode for both tx and rx
+
+ snps,force_sf_dma_mode:
+ $ref: /schemas/types.yaml#definitions/flag
+ description:
+ Force DMA to use the Store and Forward mode for both tx and
+ rx. This flag is ignored if force_thresh_dma_mode is set.
+
+ snps,en-tx-lpi-clockgating:
+ $ref: /schemas/types.yaml#definitions/flag
+ description:
+ Enable gating of the MAC TX clock during TX low-power mode
+
+ snps,multicast-filter-bins:
+ $ref: /schemas/types.yaml#definitions/uint32
+ description:
+ Number of multicast filter hash bins supported by this device
+ instance
+
+ snps,perfect-filter-entries:
+ $ref: /schemas/types.yaml#definitions/uint32
+ description:
+ Number of perfect filter entries supported by this device
+ instance
+
+ snps,ps-speed:
+ $ref: /schemas/types.yaml#definitions/uint32
+ description:
+ Port selection speed that can be passed to the core when PCS
+ is supported. For example, this is used in case of SGMII and
+ MAC2MAC connection.
+
+ mdio:
+ type: object
+ description:
+ Creates and registers an MDIO bus.
+
+ properties:
+ compatible:
+ const: snps,dwmac-mdio
+
+ required:
+ - compatible
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - interrupt-names
+ - phy-mode
+
+dependencies:
+ snps,reset-active-low: ["snps,reset-gpio"]
+ snps,reset-delay-us: ["snps,reset-gpio"]
+
+allOf:
+ - $ref: "ethernet-controller.yaml#"
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - allwinner,sun7i-a20-gmac
+ - allwinner,sun8i-a83t-emac
+ - allwinner,sun8i-h3-emac
+ - allwinner,sun8i-r40-emac
+ - allwinner,sun8i-v3s-emac
+ - allwinner,sun50i-a64-emac
+ - snps,dwxgmac
+ - snps,dwxgmac-2.10
+ - st,spear600-gmac
+
+ then:
+ properties:
+ snps,pbl:
+ allOf:
+ - $ref: /schemas/types.yaml#definitions/uint32
+ - enum: [2, 4, 8]
+ description:
+ Programmable Burst Length (tx and rx)
+
+ snps,txpbl:
+ allOf:
+ - $ref: /schemas/types.yaml#definitions/uint32
+ - enum: [2, 4, 8]
+ description:
+ Tx Programmable Burst Length. If set, DMA tx will use this
+ value rather than snps,pbl.
+
+ snps,rxpbl:
+ allOf:
+ - $ref: /schemas/types.yaml#definitions/uint32
+ - enum: [2, 4, 8]
+ description:
+ Rx Programmable Burst Length. If set, DMA rx will use this
+ value rather than snps,pbl.
+
+ snps,no-pbl-x8:
+ $ref: /schemas/types.yaml#definitions/flag
+ description:
+ Don\'t multiply the pbl/txpbl/rxpbl values by 8. For core
+ rev < 3.50, don\'t multiply the values by 4.
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - allwinner,sun7i-a20-gmac
+ - allwinner,sun8i-a83t-emac
+ - allwinner,sun8i-h3-emac
+ - allwinner,sun8i-r40-emac
+ - allwinner,sun8i-v3s-emac
+ - allwinner,sun50i-a64-emac
+ - snps,dwmac-4.00
+ - snps,dwmac-4.10a
+ - snps,dwxgmac
+ - snps,dwxgmac-2.10
+ - st,spear600-gmac
+
+ then:
+ snps,tso:
+ $ref: /schemas/types.yaml#definitions/flag
+ description:
+ Enables the TSO feature otherwise it will be managed by
+ MAC HW capability register.
+
+examples:
+ - |
+ stmmac_axi_setup: stmmac-axi-config {
+ snps,wr_osr_lmt = <0xf>;
+ snps,rd_osr_lmt = <0xf>;
+ snps,blen = <256 128 64 32 0 0 0>;
+ };
+
+ mtl_rx_setup: rx-queues-config {
+ snps,rx-queues-to-use = <1>;
+ snps,rx-sched-sp;
+ queue0 {
+ snps,dcb-algorithm;
+ snps,map-to-dma-channel = <0x0>;
+ snps,priority = <0x0>;
+ };
+ };
+
+ mtl_tx_setup: tx-queues-config {
+ snps,tx-queues-to-use = <2>;
+ snps,tx-sched-wrr;
+ queue0 {
+ snps,weight = <0x10>;
+ snps,dcb-algorithm;
+ snps,priority = <0x0>;
+ };
+
+ queue1 {
+ snps,avb-algorithm;
+ snps,send_slope = <0x1000>;
+ snps,idle_slope = <0x1000>;
+ snps,high_credit = <0x3E800>;
+ snps,low_credit = <0xFFC18000>;
+ snps,priority = <0x1>;
+ };
+ };
+
+ gmac0: ethernet@e0800000 {
+ compatible = "snps,dwxgmac-2.10", "snps,dwxgmac";
+ reg = <0xe0800000 0x8000>;
+ interrupt-parent = <&vic1>;
+ interrupts = <24 23 22>;
+ interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
+ mac-address = [000000000000]; /* Filled in by U-Boot */
+ max-frame-size = <3800>;
+ phy-mode = "gmii";
+ snps,multicast-filter-bins = <256>;
+ snps,perfect-filter-entries = <128>;
+ rx-fifo-depth = <16384>;
+ tx-fifo-depth = <16384>;
+ clocks = <&clock>;
+ clock-names = "stmmaceth";
+ snps,axi-config = <&stmmac_axi_setup>;
+ snps,mtl-rx-config = <&mtl_rx_setup>;
+ snps,mtl-tx-config = <&mtl_tx_setup>;
+ mdio0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "snps,dwmac-mdio";
+ phy1: ethernet-phy@0 {
+ reg = <0>;
+ };
+ };
+ };
+
+# FIXME: We should set it, but it would report all the generic
+# properties as additional properties.
+# additionalProperties: false
+
+...
diff --git a/Documentation/devicetree/bindings/net/stmmac.txt b/Documentation/devicetree/bindings/net/stmmac.txt
index cb694062afff..7d48782767cb 100644
--- a/Documentation/devicetree/bindings/net/stmmac.txt
+++ b/Documentation/devicetree/bindings/net/stmmac.txt
@@ -1,178 +1 @@
-* STMicroelectronics 10/100/1000/2500/10000 Ethernet (GMAC/XGMAC)
-
-Required properties:
-- compatible: Should be "snps,dwmac-<ip_version>", "snps,dwmac" or
- "snps,dwxgmac-<ip_version>", "snps,dwxgmac".
- For backwards compatibility: "st,spear600-gmac" is also supported.
-- reg: Address and length of the register set for the device
-- interrupts: Should contain the STMMAC interrupts
-- interrupt-names: Should contain a list of interrupt names corresponding to
- the interrupts in the interrupts property, if available.
- Valid interrupt names are:
- - "macirq" (combined signal for various interrupt events)
- - "eth_wake_irq" (the interrupt to manage the remote wake-up packet detection)
- - "eth_lpi" (the interrupt that occurs when Rx exits the LPI state)
-- phy-mode: See ethernet.txt file in the same directory.
-- snps,reset-gpio gpio number for phy reset.
-- snps,reset-active-low boolean flag to indicate if phy reset is active low.
-- snps,reset-delays-us is triplet of delays
- The 1st cell is reset pre-delay in micro seconds.
- The 2nd cell is reset pulse in micro seconds.
- The 3rd cell is reset post-delay in micro seconds.
-
-Optional properties:
-- resets: Should contain a phandle to the STMMAC reset signal, if any
-- reset-names: Should contain the reset signal name "stmmaceth", if a
- reset phandle is given
-- max-frame-size: See ethernet.txt file in the same directory
-- clocks: If present, the first clock should be the GMAC main clock and
- the second clock should be peripheral's register interface clock. Further
- clocks may be specified in derived bindings.
-- clock-names: One name for each entry in the clocks property, the
- first one should be "stmmaceth" and the second one should be "pclk".
-- ptp_ref: this is the PTP reference clock; in case of the PTP is available
- this clock is used for programming the Timestamp Addend Register. If not
- passed then the system clock will be used and this is fine on some
- platforms.
-- tx-fifo-depth: See ethernet.txt file in the same directory
-- rx-fifo-depth: See ethernet.txt file in the same directory
-- snps,pbl Programmable Burst Length (tx and rx)
-- snps,txpbl Tx Programmable Burst Length. Only for GMAC and newer.
- If set, DMA tx will use this value rather than snps,pbl.
-- snps,rxpbl Rx Programmable Burst Length. Only for GMAC and newer.
- If set, DMA rx will use this value rather than snps,pbl.
-- snps,no-pbl-x8 Don't multiply the pbl/txpbl/rxpbl values by 8.
- For core rev < 3.50, don't multiply the values by 4.
-- snps,aal Address-Aligned Beats
-- snps,fixed-burst Program the DMA to use the fixed burst mode
-- snps,mixed-burst Program the DMA to use the mixed burst mode
-- snps,force_thresh_dma_mode Force DMA to use the threshold mode for
- both tx and rx
-- snps,force_sf_dma_mode Force DMA to use the Store and Forward
- mode for both tx and rx. This flag is
- ignored if force_thresh_dma_mode is set.
-- snps,en-tx-lpi-clockgating Enable gating of the MAC TX clock during
- TX low-power mode
-- snps,multicast-filter-bins: Number of multicast filter hash bins
- supported by this device instance
-- snps,perfect-filter-entries: Number of perfect filter entries supported
- by this device instance
-- snps,ps-speed: port selection speed that can be passed to the core when
- PCS is supported. For example, this is used in case of SGMII
- and MAC2MAC connection.
-- snps,tso: this enables the TSO feature otherwise it will be managed by
- MAC HW capability register. Only for GMAC4 and newer.
-- AXI BUS Mode parameters: below the list of all the parameters to program the
- AXI register inside the DMA module:
- - snps,lpi_en: enable Low Power Interface
- - snps,xit_frm: unlock on WoL
- - snps,wr_osr_lmt: max write outstanding req. limit
- - snps,rd_osr_lmt: max read outstanding req. limit
- - snps,kbbe: do not cross 1KiB boundary.
- - snps,blen: this is a vector of supported burst length.
- - snps,fb: fixed-burst
- - snps,mb: mixed-burst
- - snps,rb: rebuild INCRx Burst
-- mdio: with compatible = "snps,dwmac-mdio", create and register mdio bus.
-- Multiple RX Queues parameters: below the list of all the parameters to
- configure the multiple RX queues:
- - snps,rx-queues-to-use: number of RX queues to be used in the driver
- - Choose one of these RX scheduling algorithms:
- - snps,rx-sched-sp: Strict priority
- - snps,rx-sched-wsp: Weighted Strict priority
- - For each RX queue
- - Choose one of these modes:
- - snps,dcb-algorithm: Queue to be enabled as DCB
- - snps,avb-algorithm: Queue to be enabled as AVB
- - snps,map-to-dma-channel: Channel to map
- - Specifiy specific packet routing:
- - snps,route-avcp: AV Untagged Control packets
- - snps,route-ptp: PTP Packets
- - snps,route-dcbcp: DCB Control Packets
- - snps,route-up: Untagged Packets
- - snps,route-multi-broad: Multicast & Broadcast Packets
- - snps,priority: RX queue priority (Range: 0x0 to 0xF)
-- Multiple TX Queues parameters: below the list of all the parameters to
- configure the multiple TX queues:
- - snps,tx-queues-to-use: number of TX queues to be used in the driver
- - Choose one of these TX scheduling algorithms:
- - snps,tx-sched-wrr: Weighted Round Robin
- - snps,tx-sched-wfq: Weighted Fair Queuing
- - snps,tx-sched-dwrr: Deficit Weighted Round Robin
- - snps,tx-sched-sp: Strict priority
- - For each TX queue
- - snps,weight: TX queue weight (if using a DCB weight algorithm)
- - Choose one of these modes:
- - snps,dcb-algorithm: TX queue will be working in DCB
- - snps,avb-algorithm: TX queue will be working in AVB
- [Attention] Queue 0 is reserved for legacy traffic
- and so no AVB is available in this queue.
- - Configure Credit Base Shaper (if AVB Mode selected):
- - snps,send_slope: enable Low Power Interface
- - snps,idle_slope: unlock on WoL
- - snps,high_credit: max write outstanding req. limit
- - snps,low_credit: max read outstanding req. limit
- - snps,priority: TX queue priority (Range: 0x0 to 0xF)
-Examples:
-
- stmmac_axi_setup: stmmac-axi-config {
- snps,wr_osr_lmt = <0xf>;
- snps,rd_osr_lmt = <0xf>;
- snps,blen = <256 128 64 32 0 0 0>;
- };
-
- mtl_rx_setup: rx-queues-config {
- snps,rx-queues-to-use = <1>;
- snps,rx-sched-sp;
- queue0 {
- snps,dcb-algorithm;
- snps,map-to-dma-channel = <0x0>;
- snps,priority = <0x0>;
- };
- };
-
- mtl_tx_setup: tx-queues-config {
- snps,tx-queues-to-use = <2>;
- snps,tx-sched-wrr;
- queue0 {
- snps,weight = <0x10>;
- snps,dcb-algorithm;
- snps,priority = <0x0>;
- };
-
- queue1 {
- snps,avb-algorithm;
- snps,send_slope = <0x1000>;
- snps,idle_slope = <0x1000>;
- snps,high_credit = <0x3E800>;
- snps,low_credit = <0xFFC18000>;
- snps,priority = <0x1>;
- };
- };
-
- gmac0: ethernet@e0800000 {
- compatible = "st,spear600-gmac";
- reg = <0xe0800000 0x8000>;
- interrupt-parent = <&vic1>;
- interrupts = <24 23 22>;
- interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
- mac-address = [000000000000]; /* Filled in by U-Boot */
- max-frame-size = <3800>;
- phy-mode = "gmii";
- snps,multicast-filter-bins = <256>;
- snps,perfect-filter-entries = <128>;
- rx-fifo-depth = <16384>;
- tx-fifo-depth = <16384>;
- clocks = <&clock>;
- clock-names = "stmmaceth";
- snps,axi-config = <&stmmac_axi_setup>;
- mdio0 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "snps,dwmac-mdio";
- phy1: ethernet-phy@0 {
- };
- };
- snps,mtl-rx-config = <&mtl_rx_setup>;
- snps,mtl-tx-config = <&mtl_tx_setup>;
- };
+This file has moved to snps,dwmac.yaml.
diff --git a/Documentation/devicetree/bindings/pci/83xx-512x-pci.txt b/Documentation/devicetree/bindings/pci/83xx-512x-pci.txt
index b9165b72473c..3abeecf4983f 100644
--- a/Documentation/devicetree/bindings/pci/83xx-512x-pci.txt
+++ b/Documentation/devicetree/bindings/pci/83xx-512x-pci.txt
@@ -9,7 +9,6 @@ Freescale 83xx and 512x SOCs include the same PCI bridge core.
Example (MPC8313ERDB)
pci0: pci@e0008500 {
- cell-index = <1>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x0E -mini PCI */
diff --git a/Documentation/devicetree/bindings/pinctrl/nuvoton,npcm7xx-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/nuvoton,npcm7xx-pinctrl.txt
index 83f4bbac94bb..a1264cc8660d 100644
--- a/Documentation/devicetree/bindings/pinctrl/nuvoton,npcm7xx-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/nuvoton,npcm7xx-pinctrl.txt
@@ -213,4 +213,4 @@ pinctrl: pinctrl@f0800000 {
groups = "clkreq";
function = "clkreq";
};
-}; \ No newline at end of file
+};
diff --git a/Documentation/devicetree/bindings/property-units.txt b/Documentation/devicetree/bindings/property-units.txt
index bfd33734faca..e9b8360b3288 100644
--- a/Documentation/devicetree/bindings/property-units.txt
+++ b/Documentation/devicetree/bindings/property-units.txt
@@ -12,32 +12,32 @@ unit prefixes.
Time/Frequency
----------------------------------------
-mhz : megahertz
--hz : Hertz (preferred)
--sec : seconds
--ms : milliseconds
--us : microseconds
--ns : nanoseconds
+-hz : hertz (preferred)
+-sec : second
+-ms : millisecond
+-us : microsecond
+-ns : nanosecond
Distance
----------------------------------------
--mm : millimeters
+-mm : millimeter
Electricity
----------------------------------------
--microamp : micro amps
--microamp-hours : micro amp-hours
--ohms : Ohms
--micro-ohms : micro Ohms
--microwatt-hours: micro Watt-hours
--microvolt : micro volts
--picofarads : picofarads
--femtofarads : femtofarads
+-microamp : microampere
+-microamp-hours : microampere hour
+-ohms : ohm
+-micro-ohms : microohm
+-microwatt-hours: microwatt hour
+-microvolt : microvolt
+-picofarads : picofarad
+-femtofarads : femtofarad
Temperature
----------------------------------------
--celsius : Degrees Celsius
--millicelsius : Degreee milli-Celsius
+-celsius : degree Celsius
+-millicelsius : millidegree Celsius
Pressure
----------------------------------------
--kpascal : kiloPascal
+-kpascal : kilopascal
diff --git a/Documentation/devicetree/bindings/regulator/pv88060.txt b/Documentation/devicetree/bindings/regulator/pv88060.txt
index 10a6dadc008e..6a7c8a92fdb0 100644
--- a/Documentation/devicetree/bindings/regulator/pv88060.txt
+++ b/Documentation/devicetree/bindings/regulator/pv88060.txt
@@ -121,4 +121,4 @@ Example
regulator-max-microvolt = <5000000>;
};
};
- }; \ No newline at end of file
+ };
diff --git a/Documentation/devicetree/bindings/serial/mtk-uart.txt b/Documentation/devicetree/bindings/serial/mtk-uart.txt
index c6b5262eb352..6fdffb735fb9 100644
--- a/Documentation/devicetree/bindings/serial/mtk-uart.txt
+++ b/Documentation/devicetree/bindings/serial/mtk-uart.txt
@@ -23,7 +23,12 @@ Required properties:
- reg: The base address of the UART register bank.
-- interrupts: A single interrupt specifier.
+- interrupts:
+ index 0: an interrupt specifier for the UART controller itself
+ index 1: optional, an interrupt specifier with edge sensitivity on Rx pin to
+ support Rx in-band wake up. If one would like to use this feature,
+ one must create an addtional pinctrl to reconfigure Rx pin to normal
+ GPIO before suspend.
- clocks : Must contain an entry for each entry in clock-names.
See ../clocks/clock-bindings.txt for details.
@@ -39,7 +44,11 @@ Example:
uart0: serial@11006000 {
compatible = "mediatek,mt6589-uart", "mediatek,mt6577-uart";
reg = <0x11006000 0x400>;
- interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>;
+ interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 52 IRQ_TYPE_EDGE_FALLING>;
clocks = <&uart_clk>, <&bus_clk>;
clock-names = "baud", "bus";
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&uart_pin>;
+ pinctrl-1 = <&uart_pin_sleep>;
};
diff --git a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
index 9d3efed55deb..a6b19485c9dc 100644
--- a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
+++ b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
@@ -13,6 +13,7 @@ Required properties:
- clocks: The input clock of the USART instance
Optional properties:
+- resets: Must contain the phandle to the reset controller.
- pinctrl: The reference on the pins configuration
- st,hw-flow-ctrl: bool flag to enable hardware flow control.
- rs485-rts-delay, rs485-rx-during-tx, rs485-rts-active-low,
diff --git a/Documentation/devicetree/bindings/sound/cs42l73.txt b/Documentation/devicetree/bindings/sound/cs42l73.txt
index 80ae910dbf6c..47b868b5ab01 100644
--- a/Documentation/devicetree/bindings/sound/cs42l73.txt
+++ b/Documentation/devicetree/bindings/sound/cs42l73.txt
@@ -19,4 +19,4 @@ codec: cs42l73@4a {
reg = <0x4a>;
reset_gpio = <&gpio 10 0>;
chgfreq = <0x05>;
-}; \ No newline at end of file
+};
diff --git a/Documentation/devicetree/bindings/usb/generic-ehci.yaml b/Documentation/devicetree/bindings/usb/generic-ehci.yaml
index d3b4f6415920..059f6ef1ad4a 100644
--- a/Documentation/devicetree/bindings/usb/generic-ehci.yaml
+++ b/Documentation/devicetree/bindings/usb/generic-ehci.yaml
@@ -74,7 +74,7 @@ additionalProperties: false
examples:
- |
- ehci@e0000300 {
+ usb@e0000300 {
compatible = "ibm,usb-ehci-440epx", "generic-ehci";
interrupt-parent = <&UIC0>;
interrupts = <0x1a 4>;
@@ -89,7 +89,6 @@ examples:
interrupts = <39>;
clocks = <&ahb_gates 1>;
phys = <&usbphy 1>;
- phy-names = "usb";
};
...
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index 1acf806b62bf..18b79c4cf7d5 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -149,6 +149,8 @@ patternProperties:
description: Broadcom Corporation
"^buffalo,.*":
description: Buffalo, Inc.
+ "^bur,.*":
+ description: B&R Industrial Automation GmbH
"^bticino,.*":
description: Bticino International
"^calxeda,.*":
@@ -177,6 +179,8 @@ patternProperties:
description: Common Hardware Reference Platform
"^chunghwa,.*":
description: Chunghwa Picture Tubes Ltd.
+ "^chuwi,.*":
+ description: Chuwi Innovation Ltd.
"^ciaa,.*":
description: Computadora Industrial Abierta Argentina
"^cirrus,.*":
@@ -187,8 +191,12 @@ patternProperties:
description: Chips&Media, Inc.
"^cnxt,.*":
description: Conexant Systems, Inc.
+ "^colorfly,.*":
+ description: Colorful GRP, Shenzhen Xueyushi Technology Ltd.
"^compulab,.*":
description: CompuLab Ltd.
+ "^corpro,.*":
+ description: Chengdu Corpro Technology Co., Ltd.
"^cortina,.*":
description: Cortina Systems, Inc.
"^cosmic,.*":
@@ -201,6 +209,8 @@ patternProperties:
description: Crystalfontz America, Inc.
"^csky,.*":
description: Hangzhou C-SKY Microsystems Co., Ltd
+ "^csq,.*":
+ description: Shenzen Chuangsiqi Technology Co.,Ltd.
"^cubietech,.*":
description: Cubietech, Ltd.
"^cypress,.*":
@@ -221,6 +231,8 @@ patternProperties:
description: Devantech, Ltd.
"^dh,.*":
description: DH electronics GmbH
+ "^difrnce,.*":
+ description: Shenzhen Yagu Electronic Technology Co., Ltd.
"^digi,.*":
description: Digi International Inc.
"^digilent,.*":
@@ -243,6 +255,8 @@ patternProperties:
description: DPTechnics
"^dragino,.*":
description: Dragino Technology Co., Limited
+ "^dserve,.*":
+ description: dServe Technology B.V.
"^ea,.*":
description: Embedded Artists AB
"^ebs-systart,.*":
@@ -265,6 +279,8 @@ patternProperties:
description: Emlid, Ltd.
"^emmicro,.*":
description: EM Microelectronic
+ "^empire-electronix,.*":
+ description: Empire Electronix
"^emtrion,.*":
description: emtrion GmbH
"^endless,.*":
@@ -279,6 +295,8 @@ patternProperties:
description: Ecole Polytechnique Fédérale de Lausanne
"^epson,.*":
description: Seiko Epson Corp.
+ "^esp,.*":
+ description: Espressif Systems Co. Ltd.
"^est,.*":
description: ESTeem Wireless Modems
"^ettus,.*":
@@ -329,6 +347,8 @@ patternProperties:
description: GE Fanuc Intelligent Platforms Embedded Systems, Inc.
"^GEFanuc,.*":
description: GE Fanuc Intelligent Platforms Embedded Systems, Inc.
+ "^gemei,.*":
+ description: Gemei Digital Technology Co., Ltd.
"^geniatech,.*":
description: Geniatech, Inc.
"^giantec,.*":
@@ -375,10 +395,14 @@ patternProperties:
description: Honeywell
"^hp,.*":
description: Hewlett Packard
+ "^hsg,.*":
+ description: HannStar Display Co.
"^holtek,.*":
description: Holtek Semiconductor, Inc.
"^hwacom,.*":
description: HwaCom Systems Inc.
+ "^hyundai,.*":
+ description: Hyundai Technology
"^i2se,.*":
description: I2SE GmbH
"^ibm,.*":
@@ -393,6 +417,10 @@ patternProperties:
description: ILI Technology Corporation (ILITEK)
"^img,.*":
description: Imagination Technologies Ltd.
+ "^incircuit,.*":
+ description: In-Circuit GmbH
+ "^inet-tek,.*":
+ description: Shenzhen iNet Mobile Internet Technology Co., Ltd
"^infineon,.*":
description: Infineon Technologies
"^inforce,.*":
@@ -427,6 +455,8 @@ patternProperties:
description: Japan Display Inc.
"^jedec,.*":
description: JEDEC Solid State Technology Association
+ "^jesurun,.*":
+ description: Shenzhen Jesurun Electronics Business Dept.
"^jianda,.*":
description: Jiandangjing Technology Co., Ltd.
"^karo,.*":
@@ -451,6 +481,8 @@ patternProperties:
description: Rakuten Kobo Inc.
"^koe,.*":
description: Kaohsiung Opto-Electronics Inc.
+ "^kontron,.*":
+ description: Kontron S&T AG
"^kosagi,.*":
description: Sutajio Ko-Usagi PTE Ltd.
"^kyo,.*":
@@ -459,6 +491,8 @@ patternProperties:
description: LaCie
"^laird,.*":
description: Laird PLC
+ "^lamobo,.*":
+ description: Ketai Huajie Technology Co., Ltd.
"^lantiq,.*":
description: Lantiq Semiconductor
"^lattice,.*":
@@ -477,6 +511,8 @@ patternProperties:
description: Lichee Pi
"^linaro,.*":
description: Linaro Limited
+ "^linksprite,.*":
+ description: LinkSprite Technologies, Inc.
"^linksys,.*":
description: Belkin International, Inc. (Linksys)
"^linux,.*":
@@ -493,6 +529,8 @@ patternProperties:
description: Liebherr-Werk Nenzing GmbH
"^macnica,.*":
description: Macnica Americas
+ "^mapleboard,.*":
+ description: Mapleboard.org
"^marvell,.*":
description: Marvell Technology Group Ltd.
"^maxbotix,.*":
@@ -533,6 +571,8 @@ patternProperties:
description: Micron Technology Inc.
"^mikroe,.*":
description: MikroElektronika d.o.o.
+ "^miniand,.*":
+ description: Miniand Tech
"^minix,.*":
description: MINIX Technology Ltd.
"^miramems,.*":
@@ -663,24 +703,32 @@ patternProperties:
description: Picochip Ltd
"^pine64,.*":
description: Pine64
+ "^pineriver,.*":
+ description: Shenzhen PineRiver Designs Co., Ltd.
"^pixcir,.*":
description: PIXCIR MICROELECTRONICS Co., Ltd
"^plantower,.*":
description: Plantower Co., Ltd
"^plathome,.*":
- description: Plat'Home Co., Ltd.
+ description: Plat\'Home Co., Ltd.
"^plda,.*":
description: PLDA
"^plx,.*":
description: Broadcom Corporation (formerly PLX Technology)
"^pni,.*":
description: PNI Sensor Corporation
+ "^polaroid,.*":
+ description: Polaroid Corporation
"^portwell,.*":
description: Portwell Inc.
"^poslab,.*":
description: Poslab Technology Co., Ltd.
+ "^pov,.*":
+ description: Point of View International B.V.
"^powervr,.*":
description: PowerVR (deprecated, use img)
+ "^primux,.*":
+ description: Primux Trading, S.L.
"^probox2,.*":
description: PROBOX2 (by W2COMP Co., Ltd.)
"^pulsedlight,.*":
@@ -693,6 +741,8 @@ patternProperties:
description: QEMU, a generic and open source machine emulator and virtualizer
"^qi,.*":
description: Qi Hardware
+ "^qihua,.*":
+ description: Chengdu Kaixuan Information Technology Co., Ltd.
"^qiaodian,.*":
description: QiaoDian XianShi Corporation
"^qnap,.*":
@@ -715,6 +765,8 @@ patternProperties:
description: Realtek Semiconductor Corp.
"^renesas,.*":
description: Renesas Electronics Corporation
+ "^rervision,.*":
+ description: Shenzhen Rervision Technology Co., Ltd.
"^richtek,.*":
description: Richtek Technology Corporation
"^ricoh,.*":
@@ -783,8 +835,14 @@ patternProperties:
description: Silergy Corp.
"^siliconmitus,.*":
description: Silicon Mitus, Inc.
- "^simte,.*":
- description: k
+ "^simtek,.*":
+ description: Cypress Semiconductor Corporation (Simtek Corporation)
+ "^sinlinx,.*":
+ description: Sinlinx Electronics Technology Co., LTD
+ "^sinovoip,.*":
+ description: SinoVoip Co., Ltd
+ "^sipeed,.*":
+ description: Shenzhen Sipeed Technology Co., Ltd.
"^sirf,.*":
description: SiRF Technology, Inc.
"^sis,.*":
@@ -797,6 +855,8 @@ patternProperties:
description: Standard Microsystems Corporation
"^snps,.*":
description: Synopsys, Inc.
+ "^sochip,.*":
+ description: Shenzhen SoChip Technology Co., Ltd.
"^socionext,.*":
description: Socionext Inc.
"^solidrun,.*":
@@ -903,6 +963,8 @@ patternProperties:
description: United Radiant Technology Corporation
"^usi,.*":
description: Universal Scientific Industrial Co., Ltd.
+ "^utoo,.*":
+ description: Aigo Digital Technology Co., Ltd.
"^v3,.*":
description: V3 Semiconductor
"^vamrs,.*":
@@ -939,10 +1001,14 @@ patternProperties:
description: Winbond Electronics corp.
"^winstar,.*":
description: Winstar Display Corp.
+ "^wits,.*":
+ description: Shenzhen Merrii Technology Co., Ltd. (WITS)
"^wlf,.*":
description: Wolfson Microelectronics
"^wm,.*":
description: Wondermedia Technologies, Inc.
+ "^wobo,.*":
+ description: Wobo
"^x-powers,.*":
description: X-Powers
"^xes,.*":
@@ -953,6 +1019,8 @@ patternProperties:
description: Xilinx
"^xunlong,.*":
description: Shenzhen Xunlong Software CO.,Limited
+ "^yones-toptech,.*":
+ description: Yones Toptech Co., Ltd.
"^ysoft,.*":
description: Y Soft Corporation a.s.
"^zarlink,.*":
@@ -970,7 +1038,7 @@ patternProperties:
# Normal property name match without a comma
# These should catch all node/property names without a prefix
- "^[a-zA-Z0-9#][a-zA-Z0-9+\\-._@]{0,63}$": true
+ "^[a-zA-Z0-9#_][a-zA-Z0-9+\\-._@]{0,63}$": true
"^[a-zA-Z0-9+\\-._]*@[0-9a-zA-Z,]*$": true
"^#.*": true