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authorShengjiu Wang <shengjiu.wang@freescale.com>2014-09-16 13:39:06 +0800
committerNitin Garg <nitin.garg@freescale.com>2015-04-14 14:00:16 -0500
commit82a606e594f2b6e00e94af0c03bdf040d796d560 (patch)
treea6f61ca968c4e36161d5d0a62e08af5bdd96fef0 /Documentation/devicetree
parent75ce38a9e4d0052b52c20b18566c4c41a791f99c (diff)
ENGR00331635-1: dma: imx-sdma: Add imx6sx platform support
The new Solo X has more requirements for SDMA events. So it creates a event mux to remap most of event numbers in GPR (General Purpose Register). If we want to use SDMA support for those module who do not get the even number as default, we need to configure GPR first. Thus this patch adds this support of GPR event remapping configuration to the SDMA driver. Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r--Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt6
1 files changed, 6 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt b/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt
index 62f0d1b275ab..7074f1cc02eb 100644
--- a/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt
+++ b/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt
@@ -16,6 +16,12 @@ Required properties:
- #dma-cells : Must be <3>.
The first cell specifies the DMA request/event ID. See details below
about the second and third cell.
+- gpr : The phandle to general purpose register node.
+- fsl,sdma-event-remap : Register bits of sdma event remap, the format is
+ <reg shift val>.
+ reg is the gpr register offset.
+ shift is the bit offset of event remap.
+ val is the value of the bit to be set.
- fsl,sdma-ram-script-name : Should contain the full path of SDMA RAM
scripts firmware