diff options
author | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 15:20:36 -0700 |
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committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 15:20:36 -0700 |
commit | 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch) | |
tree | 0bba044c4ce775e45a88a51686b5d9f90697ea9d /Documentation/fb/pxafb.txt |
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.
Let it rip!
Diffstat (limited to 'Documentation/fb/pxafb.txt')
-rw-r--r-- | Documentation/fb/pxafb.txt | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/Documentation/fb/pxafb.txt b/Documentation/fb/pxafb.txt new file mode 100644 index 000000000000..db9b8500b43b --- /dev/null +++ b/Documentation/fb/pxafb.txt @@ -0,0 +1,54 @@ +Driver for PXA25x LCD controller +================================ + +The driver supports the following options, either via +options=<OPTIONS> when modular or video=pxafb:<OPTIONS> when built in. + +For example: + modprobe pxafb options=mode:640x480-8,passive +or on the kernel command line + video=pxafb:mode:640x480-8,passive + +mode:XRESxYRES[-BPP] + XRES == LCCR1_PPL + 1 + YRES == LLCR2_LPP + 1 + The resolution of the display in pixels + BPP == The bit depth. Valid values are 1, 2, 4, 8 and 16. + +pixclock:PIXCLOCK + Pixel clock in picoseconds + +left:LEFT == LCCR1_BLW + 1 +right:RIGHT == LCCR1_ELW + 1 +hsynclen:HSYNC == LCCR1_HSW + 1 +upper:UPPER == LCCR2_BFW +lower:LOWER == LCCR2_EFR +vsynclen:VSYNC == LCCR2_VSW + 1 + Display margins and sync times + +color | mono => LCCR0_CMS + umm... + +active | passive => LCCR0_PAS + Active (TFT) or Passive (STN) display + +single | dual => LCCR0_SDS + Single or dual panel passive display + +4pix | 8pix => LCCR0_DPD + 4 or 8 pixel monochrome single panel data + +hsync:HSYNC +vsync:VSYNC + Horizontal and vertical sync. 0 => active low, 1 => active + high. + +dpc:DPC + Double pixel clock. 1=>true, 0=>false + +outputen:POLARITY + Output Enable Polarity. 0 => active low, 1 => active high + +pixclockpol:POLARITY + pixel clock polarity + 0 => falling edge, 1 => rising edge |