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authorAndrea Gelmini <andrea.gelmini@gelma.net>2010-06-03 11:33:50 +0200
committerJean Delvare <khali@linux-fr.org>2010-06-03 11:33:50 +0200
commit89140f41575ae2a7a5c24e856880594ccbdfcaff (patch)
treebb8d9a24a727d95d4664ea23ff7450503cfe5f18 /Documentation/i2c/ten-bit-addresses
parentaef4b9aaae1decc775778903922bd0075cce7a88 (diff)
Documentation/i2c: Checkpatch cleanup
Remove all trailing whitespace in Documentation/i2c. Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Signed-off-by: Jean Delvare <khali@linux-fr.org>
Diffstat (limited to 'Documentation/i2c/ten-bit-addresses')
-rw-r--r--Documentation/i2c/ten-bit-addresses6
1 files changed, 3 insertions, 3 deletions
diff --git a/Documentation/i2c/ten-bit-addresses b/Documentation/i2c/ten-bit-addresses
index 200074f81360..e9890709c508 100644
--- a/Documentation/i2c/ten-bit-addresses
+++ b/Documentation/i2c/ten-bit-addresses
@@ -1,17 +1,17 @@
-The I2C protocol knows about two kinds of device addresses: normal 7 bit
+The I2C protocol knows about two kinds of device addresses: normal 7 bit
addresses, and an extended set of 10 bit addresses. The sets of addresses
do not intersect: the 7 bit address 0x10 is not the same as the 10 bit
address 0x10 (though a single device could respond to both of them). You
select a 10 bit address by adding an extra byte after the address
byte:
- S Addr7 Rd/Wr ....
+ S Addr7 Rd/Wr ....
becomes
S 11110 Addr10 Rd/Wr
S is the start bit, Rd/Wr the read/write bit, and if you count the number
of bits, you will see the there are 8 after the S bit for 7 bit addresses,
and 16 after the S bit for 10 bit addresses.
-WARNING! The current 10 bit address support is EXPERIMENTAL. There are
+WARNING! The current 10 bit address support is EXPERIMENTAL. There are
several places in the code that will cause SEVERE PROBLEMS with 10 bit
addresses, even though there is some basic handling and hooks. Also,
almost no supported adapter handles the 10 bit addresses correctly.