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authorAaron Brice <aaron.brice@datasoft.com>2016-10-06 15:13:04 -0700
committerStefan Agner <stefan@agner.ch>2018-05-30 14:07:05 +0200
commitfdd5ac219ee5a69c8c722b4f2162804d59e71cc6 (patch)
tree7c26cb740e51a939eeeac97c42dfe739fda6fa2d /Documentation/static-keys.txt
parent39ac0033f2345ce7b5d8ca4439192407dacb2355 (diff)
tty: serial: fsl_lpuart: Fix Tx DMA edge case
In the case where head == 0 on the circular buffer, there should be one DMA buffer, not two. The second zero-length buffer would break the lpuart driver, transfer would never complete. Signed-off-by: Aaron Brice <aaron.brice@datasoft.com> Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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