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| author | Shawn Guo <shawn.guo@linaro.org> | 2014-02-11 09:52:09 +0800 |
|---|---|---|
| committer | Shawn Guo <shawn.guo@linaro.org> | 2014-03-05 10:40:46 +0800 |
| commit | 8d9ee21e98205eebc7fc6caf08a764c9e12c7d68 (patch) | |
| tree | 36a738878f16ced02eabf99440a2effab9063f8f /Documentation/unaligned-memory-access.txt | |
| parent | 7899d7d5789653511f19f02ff6819f8c330018fc (diff) | |
bus: imx-weim: support CS GPR configuration
For imx50-weim and imx6q-weim type of devices, there might a WEIM CS
space configuration register in General Purpose Register controller,
e.g. IOMUXC_GPR1 on i.MX6Q.
Depending on which configuration of the following 4 is chosen for given
system, IOMUXC_GPR1[11:0] should be set up as 05, 033, 0113 or 01111
correspondingly.
CS0(128M) CS1(0M) CS2(0M) CS3(0M)
CS0(64M) CS1(64M) CS2(0M) CS3(0M)
CS0(64M) CS1(32M) CS2(32M) CS3(0M)
CS0(32M) CS1(32M) CS2(32M) CS3(32M)
The patch creates a function for such type of devices, which scans
'ranges' property of WEIM node and build the GPR value incrementally.
Thus the WEIM CS GPR can be set up automatically at boot time.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Philippe De Muyter <phdm@macqel.be>
Tested-by: Philippe De Muyter <phdm@macqel.be>
Diffstat (limited to 'Documentation/unaligned-memory-access.txt')
0 files changed, 0 insertions, 0 deletions