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| author | Christoffer Dall <c.dall@virtualopensystems.com> | 2013-01-20 18:28:10 -0500 |
|---|---|---|
| committer | Christoffer Dall <c.dall@virtualopensystems.com> | 2013-01-23 13:29:14 -0500 |
| commit | 1138245ccf9652429630c09fb068e9b12c56c3d3 (patch) | |
| tree | f4ef6b0be9f30ee57e7044a5311bf6487bb8bfa1 /Documentation/virtual | |
| parent | 5b3e5e5bf230f56309706dfc05fc0cb173cc83aa (diff) | |
KVM: ARM: User space API for getting/setting co-proc registers
The following three ioctls are implemented:
- KVM_GET_REG_LIST
- KVM_GET_ONE_REG
- KVM_SET_ONE_REG
Now we have a table for all the cp15 registers, we can drive a generic
API.
The register IDs carry the following encoding:
ARM registers are mapped using the lower 32 bits. The upper 16 of that
is the register group type, or coprocessor number:
ARM 32-bit CP15 registers have the following id bit patterns:
0x4002 0000 000F <zero:1> <crn:4> <crm:4> <opc1:4> <opc2:3>
ARM 64-bit CP15 registers have the following id bit patterns:
0x4003 0000 000F <zero:1> <zero:4> <crm:4> <opc1:4> <zero:3>
For futureproofing, we need to tell QEMU about the CP15 registers the
host lets the guest access.
It will need this information to restore a current guest on a future
CPU or perhaps a future KVM which allow some of these to be changed.
We use a separate table for these, as they're only for the userspace API.
Reviewed-by: Will Deacon <will.deacon@arm.com>
Reviewed-by: Marcelo Tosatti <mtosatti@redhat.com>
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Signed-off-by: Christoffer Dall <c.dall@virtualopensystems.com>
Diffstat (limited to 'Documentation/virtual')
| -rw-r--r-- | Documentation/virtual/kvm/api.txt | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/Documentation/virtual/kvm/api.txt b/Documentation/virtual/kvm/api.txt index 505049299298..0e2287406464 100644 --- a/Documentation/virtual/kvm/api.txt +++ b/Documentation/virtual/kvm/api.txt @@ -1799,6 +1799,11 @@ is the register group type, or coprocessor number: ARM core registers have the following id bit patterns: 0x4002 0000 0010 <index into the kvm_regs struct:16> +ARM 32-bit CP15 registers have the following id bit patterns: + 0x4002 0000 000F <zero:1> <crn:4> <crm:4> <opc1:4> <opc2:3> + +ARM 64-bit CP15 registers have the following id bit patterns: + 0x4003 0000 000F <zero:1> <zero:4> <crm:4> <opc1:4> <zero:3> 4.69 KVM_GET_ONE_REG |