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| author | Peter Chen <peter.chen@freescale.com> | 2013-10-11 11:11:05 +0800 |
|---|---|---|
| committer | Peter Chen <peter.chen@freescale.com> | 2013-11-06 15:27:40 +0800 |
| commit | b6f11d88b2f57ac4ffa258b63a0cb3d9c41c78eb (patch) | |
| tree | e310e6948d0b2ed6ba4e57a81d2099dd2ad535dc /Documentation | |
| parent | 3f42c65f494af5701eba3c9a7f0285f4e2a4b395 (diff) | |
ENGR00286426-4 usb: doc: phy-mxs: update binding for adding anatop phandle
Add anatop phandle which is used to access anatop registers to
control PHY's power and other USB operations.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/devicetree/bindings/usb/mxs-phy.txt | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/usb/mxs-phy.txt b/Documentation/devicetree/bindings/usb/mxs-phy.txt index d850e551cefe..059536cd5c78 100644 --- a/Documentation/devicetree/bindings/usb/mxs-phy.txt +++ b/Documentation/devicetree/bindings/usb/mxs-phy.txt @@ -5,10 +5,12 @@ Required properties: for imx6dq and imx6dl, "fsl,imx6sl-usbphy" for imx6sl - reg: Should contain registers location and length - interrupts: Should contain phy interrupt +- fsl,anatop: phandle for anatop register, it is only for imx6 SoC series Example: usbphy1: usbphy@020c9000 { compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy"; reg = <0x020c9000 0x1000>; interrupts = <0 44 0x04>; + fsl,anatop = <&anatop>; }; |