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author | Catalin Marinas <catalin.marinas@arm.com> | 2014-07-24 14:14:42 +0100 |
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committer | Christoffer Dall <christoffer.dall@linaro.org> | 2014-10-02 20:50:54 +0200 |
commit | 8cbfd57948a16fe813e72e6b0ccb36b6417a78d8 (patch) | |
tree | 5dcfcaa0af8f3f517b9a147388f9d22e3fba187a /Documentation | |
parent | a1e3b5e1f3bb785660db2d1078ba3a7b57ed01bd (diff) |
arm64: gicv3: Allow GICv3 compilation with older binutils
GICv3 introduces new system registers accessible with the full msr/mrs
syntax (e.g. mrs x0, Sop0_op1_CRm_CRn_op2). However, only recent
binutils understand the new syntax. This patch introduces msr_s/mrs_s
assembly macros which generate the equivalent instructions above and
converts the existing GICv3 code (both drivers/irqchip/ and
arch/arm64/kernel/).
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Reported-by: Olof Johansson <olof@lixom.net>
Tested-by: Olof Johansson <olof@lixom.net>
Suggested-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
(cherry picked from commit 72c5839515260dce966cd24f54436e6583288e6c)
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Diffstat (limited to 'Documentation')
0 files changed, 0 insertions, 0 deletions