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| author | Dan Willemsen <dwillemsen@nvidia.com> | 2013-02-05 21:24:32 -0800 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2013-09-14 12:52:00 -0700 |
| commit | 9f59946105bc1222a4b1340d5861d9a01b82a4fd (patch) | |
| tree | 0eda7a472f907e7ffb14fd83997a05b4f3320d48 /Documentation | |
| parent | 186df9c624de0be4bf8dd6b064e64f85aa00bfc5 (diff) | |
Revert "iommu/tegra: smmu: Add device tree support for SMMU"
This reverts commit 0760e8faa960f8ee991fa4acb802db4e20661281.
Change-Id: I92e01b224d9fcec75636e24f505a21962f14b8bf
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/devicetree/bindings/iommu/nvidia,tegra30-smmu.txt | 21 |
1 files changed, 0 insertions, 21 deletions
diff --git a/Documentation/devicetree/bindings/iommu/nvidia,tegra30-smmu.txt b/Documentation/devicetree/bindings/iommu/nvidia,tegra30-smmu.txt deleted file mode 100644 index 89fb5434b730..000000000000 --- a/Documentation/devicetree/bindings/iommu/nvidia,tegra30-smmu.txt +++ /dev/null @@ -1,21 +0,0 @@ -NVIDIA Tegra 30 IOMMU H/W, SMMU (System Memory Management Unit) - -Required properties: -- compatible : "nvidia,tegra30-smmu" -- reg : Should contain 3 register banks(address and length) for each - of the SMMU register blocks. -- interrupts : Should contain MC General interrupt. -- nvidia,#asids : # of ASIDs -- dma-window : IOVA start address and length. -- nvidia,ahb : phandle to the ahb bus connected to SMMU. - -Example: - smmu { - compatible = "nvidia,tegra30-smmu"; - reg = <0x7000f010 0x02c - 0x7000f1f0 0x010 - 0x7000f228 0x05c>; - nvidia,#asids = <4>; /* # of ASIDs */ - dma-window = <0 0x40000000>; /* IOVA start & length */ - nvidia,ahb = <&ahb>; - }; |