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authorGao Pan <pandy.gao@nxp.com>2018-01-19 15:50:51 +0800
committerJason Liu <jason.hui.liu@nxp.com>2019-02-12 10:30:14 +0800
commit3b1f1470021325e2fa5f63e8e63b79579761a17d (patch)
treedac8a88ec3312e26cefe99e2264b0d1c1ac5e6c0 /Documentation
parentdad6ae734c3accb9d1390345dfe1ebf1f897b67f (diff)
MLK-17429-2 Documentation: add doc for EMVSIM
add devicetree binding doc for add for EMVSIM Signed-off-by: Gao Pan <pandy.gao@nxp.com> Reviewed-by: Andy Duan <fugang.duan@nxp.com>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/sim/imx_emvsim.txt22
1 files changed, 22 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/sim/imx_emvsim.txt b/Documentation/devicetree/bindings/sim/imx_emvsim.txt
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+++ b/Documentation/devicetree/bindings/sim/imx_emvsim.txt
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+* NXP EMVSIM for i.MX8
+
+Required properties:
+- compatible :
+ - "fsl,imx8-emvsim" for EMVSIM compatible with the one integrated on i.MX8 soc
+- reg : address and length of EMVSIM registers
+- interrupt : core interrupt controller
+- clocks : EMVSIM clock specifier
+- power-domains : power domain for EMVSIM
+
+Examples:
+
+emvsim0: sim0@5a0d0000 {
+ compatible = "fsl,imx8-emvsim";
+ reg = <0x0 0x5a0d0000 0x0 0x10000>;
+ interrupts = <GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8QM_EMVSIM0_CLK>,
+ <&clk IMX8QM_EMVSIM0_IPG_CLK>;
+ clock-names = "sim", "ipg";
+ power-domains = <&pd_ldo1_sim>;
+ status = "disabled";
+};