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authorSuneel Garapati <suneel.garapati@xilinx.com>2015-06-09 14:23:49 +0530
committerTejun Heo <tj@kernel.org>2015-06-10 11:15:17 +0900
commit03a740fb682c5ae9bf49ebad284986e9afc63958 (patch)
tree27124d0ae478be21e71036ea38416b7eb2b5d498 /Documentation
parent5163fb62541e38fea400f96dcef9aa539fd00b48 (diff)
devicetree:bindings: add devicetree bindings for ceva ahci
adds bindings for CEVA AHCI SATA controller. optional property broken-gen2 is useful incase of hardware speed limitation. Signed-off-by: Suneel Garapati <suneel.garapati@xilinx.com> Signed-off-by: Tejun Heo <tj@kernel.org>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/ata/ahci-ceva.txt20
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diff --git a/Documentation/devicetree/bindings/ata/ahci-ceva.txt b/Documentation/devicetree/bindings/ata/ahci-ceva.txt
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+Binding for CEVA AHCI SATA Controller
+
+Required properties:
+ - reg: Physical base address and size of the controller's register area.
+ - compatible: Compatibility string. Must be 'ceva,ahci-1v84'.
+ - clocks: Input clock specifier. Refer to common clock bindings.
+ - interrupts: Interrupt specifier. Refer to interrupt binding.
+
+Optional properties:
+ - ceva,broken-gen2: limit to gen1 speed instead of gen2.
+
+Examples:
+ ahci@fd0c0000 {
+ compatible = "ceva,ahci-1v84";
+ reg = <0xfd0c0000 0x200>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 133 4>;
+ clocks = <&clkc SATA_CLK_ID>;
+ ceva,broken-gen2;
+ };