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authorBayi Cheng <bayi.cheng@mediatek.com>2015-11-06 23:48:07 +0800
committerBrian Norris <computersforpeace@gmail.com>2015-11-11 12:37:53 -0800
commitbf9c37cb627a3f690e246d9326a4a94913771bbf (patch)
tree919dc65dea22612c9ce003ff4afebd09f040548c /Documentation
parentd2fd05bb6769d53ab98a11b080b3fb889276049d (diff)
doc: dt: mtd: add documentation for Mediatek spi-nor controller
Add device tree binding documentation for serial flash with Mediatek serial flash controller Signed-off-by: Bayi Cheng <bayi.cheng@mediatek.com> Acked-by: Rob Herring <robh@kernel.org> [Brian: fixed up language] Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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-rw-r--r--Documentation/devicetree/bindings/mtd/mtk-quadspi.txt41
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diff --git a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
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+* Serial NOR flash controller for MTK MT81xx (and similar)
+
+Required properties:
+- compatible: should be "mediatek,mt8173-nor";
+- reg: physical base address and length of the controller's register
+- clocks: the phandle of the clocks needed by the nor controller
+- clock-names: the names of the clocks
+ the clocks should be named "spi" and "sf". "spi" is used for spi bus,
+ and "sf" is used for controller, these are the clocks witch
+ hardware needs to enabling nor flash and nor flash controller.
+ See Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
+- #address-cells: should be <1>
+- #size-cells: should be <0>
+
+The SPI flash must be a child of the nor_flash node and must have a
+compatible property. Also see jedec,spi-nor.txt.
+
+Required properties:
+- compatible: May include a device-specific string consisting of the manufacturer
+ and name of the chip. Must also include "jedec,spi-nor" for any
+ SPI NOR flash that can be identified by the JEDEC READ ID opcode (0x9F).
+- reg : Chip-Select number
+
+Example:
+
+nor_flash: spi@1100d000 {
+ compatible = "mediatek,mt8173-nor";
+ reg = <0 0x1100d000 0 0xe0>;
+ clocks = <&pericfg CLK_PERI_SPI>,
+ <&topckgen CLK_TOP_SPINFI_IFR_SEL>;
+ clock-names = "spi", "sf";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ };
+};
+