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authorLiu Ying <victor.liu@nxp.com>2022-05-31 14:03:11 +0800
committerLiu Ying <victor.liu@nxp.com>2022-07-13 13:20:27 +0800
commit754b56711f9cfe070e0fcf6daabae31c1b011e07 (patch)
tree3c2c22d9f462a719d349980f79d400f0c4581238 /Documentation
parentde61fff77c2e6a0b98d249321b7c460bf16b94d1 (diff)
LF-6263-1 dt-bindings: phy: fsl,imx8mp-lvds-phy: Add i.MX93 LVDS phy binding support
i.MX93 LVDS phy is similar to i.MX8mp LVDS phy. This patch adds i.MX93 LVDS phy binding support. Cc: Sandor Yu <Sandor.yu@nxp.com> Reviewed-by: Sandor Yu <Sandor.yu@nxp.com> Signed-off-by: Liu Ying <victor.liu@nxp.com>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/phy/fsl,imx8mp-lvds-phy.yaml34
1 files changed, 31 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/phy/fsl,imx8mp-lvds-phy.yaml b/Documentation/devicetree/bindings/phy/fsl,imx8mp-lvds-phy.yaml
index 2dc5e0038365..5f11266514da 100644
--- a/Documentation/devicetree/bindings/phy/fsl,imx8mp-lvds-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/fsl,imx8mp-lvds-phy.yaml
@@ -11,13 +11,15 @@ maintainers:
- Liu Ying <victor.liu@nxp.com>
description: |
- LVDS PHY found on i.MX8MP SoC. The IP block contains two PHYs, each of
- which supports a four data lane LVDS channel.
+ LVDS PHY found on i.MX8MP and i.MX93 SoCs. i.MX8MP LVDS PHY IP contains
+ two PHYs, each of which supports a four data lane LVDS channel. i.MX93
+ LVDS PHY IP contains one PHY.
properties:
compatible:
enum:
- fsl,imx8mp-lvds-phy
+ - fsl,imx93-lvds-phy
"#address-cells":
const: 1
@@ -36,6 +38,9 @@ properties:
items:
- const: apb
+ power-domains:
+ maxItems: 1
+
port@0:
type: object
description: A port node pointing to the PHY instance0's port node
@@ -69,13 +74,35 @@ required:
- "#address-cells"
- "#size-cells"
- gpr
+ - clocks
+ - clock-names
+ - power-domains
- port@0
- - port@1
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: fsl,imx8mp-lvds-phy
+ then:
+ required:
+ - port@1
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: fsl,imx93-lvds-phy
+ then:
+ properties:
+ port@1: false
additionalProperties: false
examples:
- |
+ #include <dt-bindings/clock/imx8mp-clock.h>
ldb_phy: phy@32ec0128 {
compatible = "fsl,imx8mp-lvds-phy";
#address-cells = <1>;
@@ -83,6 +110,7 @@ examples:
gpr = <&mediamix_blk_ctl>;
clocks = <&clk IMX8MP_CLK_MEDIA_APB_ROOT>;
clock-names = "apb";
+ power-domains = <&mediamix_pd>;
ldb_phy1: port@0 {
reg = <0>;