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authorZhao Qiang <B45475@freescale.com>2014-04-01 17:10:50 +0800
committerNitin Garg <nitin.garg@freescale.com>2015-01-15 21:18:59 -0600
commitf979228c78b5809c5626b46eba8551c93370f8b3 (patch)
tree37dd828fe966b5bf0802a980e2b772b31ec2fd23 /Documentation
parent95cec62006b377634d788d4cca286e46f4dfd54c (diff)
spi: add "spi-lsb-first" to devicetree
add optional property devicetree for SPI slave nodes into devicetree so that LSB mode can be enabled by devicetree. Signed-off-by: Zhao Qiang <B45475@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit cd6339e6ced387ad67b5551dd2931cfd7e8b970b) (cherry picked from commit 09623c20b3e6b11a914343d4b0f15b63e683f0d8)
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/spi/spi-bus.txt2
1 files changed, 2 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/spi/spi-bus.txt b/Documentation/devicetree/bindings/spi/spi-bus.txt
index e5a4d1b4acfe..22d57404fdc3 100644
--- a/Documentation/devicetree/bindings/spi/spi-bus.txt
+++ b/Documentation/devicetree/bindings/spi/spi-bus.txt
@@ -55,6 +55,8 @@ contain the following properties.
chip select active high
- spi-3wire - (optional) Empty property indicating device requires
3-wire mode.
+- spi-lsb-first - (optional) Empty property indicating device requires
+ LSB first mode.
- spi-tx-bus-width - (optional) The bus width(number of data wires) that
used for MOSI. Defaults to 1 if not present.
- spi-rx-bus-width - (optional) The bus width(number of data wires) that