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authorLukasz Majewski <lukma@denx.de>2017-10-07 22:36:51 +0000
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2017-11-08 10:08:35 +0100
commit64674bc8eeadb532cfc18e19a500294447d4bb2b (patch)
treeb88fd48d52692f0fecf41b404202a23b4181f4eb /Documentation
parent227afd93a6ad921a89171422b60b91b9aa1d9af1 (diff)
net: phy: dp83867: Recover from "port mirroring" N/A MODE4
[ Upstream commit ac6e058b75be71208e98a5808453aae9a17be480 ] The DP83867 when not properly bootstrapped - especially with LED_0 pin - can enter N/A MODE4 for "port mirroring" feature. To provide normal operation of the PHY, one needs not only to explicitly disable the port mirroring feature, but as well stop some IC internal testing (which disables RGMII communication). To do that the STRAP_STS1 (0x006E) register must be read and RESERVED bit 11 examined. When it is set, the another RESERVED bit (11) at PHYCR (0x0010) register must be clear to disable testing mode and enable RGMII communication. Thorough explanation of the problem can be found at following e2e thread: "DP83867IR: Problem with RESERVED bits in PHY Control Register (PHYCR) - Linux driver" https://e2e.ti.com/support/interface/ethernet/f/903/p/571313/2096954#2096954 Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Sasha Levin <alexander.levin@verizon.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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