Documentation: update doc for dc/dsi dt

Update documentation of tegra114/tegra124
dc, dsi device tree.

Bug 1371533
Signed-off-by: Min-wuk Lee <mlee@nvidia.com>

Change-Id: Id0d3206e10de1692c5df7c1da1c4f0fc02d93cd0
Reviewed-on: http://git-master/r/351751
Reviewed-by: Min-wuk Lee <mlee@nvidia.com>
Tested-by: Min-wuk Lee <mlee@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>

6 files changed, 118 insertions, 122 deletions

diff --git a/Documentation/devicetree/bindings/video/nvidia,tegra114-dc.txt b/Documentation/devicetree/bindings/video/nvidia,tegra114-dc.txt
index 18994e51f12b..6a055fefeadb 100644
--- a/Documentation/devicetree/bindings/video/nvidia,tegra114-dc.txt
+++ b/Documentation/devicetree/bindings/video/nvidia,tegra114-dc.txt
@@ -17,6 +17,10 @@ NVIDIA Tegra114 Display Controller
  - nvidia,cmu-enable: Toggle switch for color management unit.
  - nvidia,low-v-win: If low_v_win is set, we can lower vdd_core when that windows
    is the only one active.
+ - avdd_hdmi-supply: phandle to the regulator device tree node for HDMI supply voltage,
+   HDMI_AVDD.
+ - avdd_hdmi_pll-supply: phandle to the regulator device tree node for HDMI pll supply.
+ - vdd_hdmi_5v0-supply: phandle to the regulator device tree node for HDMI 5V source.
 
  - Child nodes represent node of modes, output settings, framebuffer data,
    smart dimmer settings, color management unit settings, dsi output device settings.
@@ -144,6 +148,9 @@ Example
 			nvidia,dc-flags = "dc_flag_en";
 			nvidia,emc-clk-rate = <204000000>;
 			nvidia,cmu-enable = <1>;
+			avdd_hdmi-supply = <&palmas_ldoln>;
+			avdd_hdmi_pll-supply = <&palmas_ldo1>;
+			vdd_hdmi_5v0-supply = <&vdd_hdmi>;
 			dc-default-out {
 				nvidia,out-type = "dsi";
 				nvidia,out-width = <217>;
@@ -341,8 +348,8 @@ Example
 			reg = <0x54240000 0x00040000>;
 			interrupts = <0 74 0x04>;
 			status = "okay";
-			nvidia,dc_flags = "dc_flag_en";
-			nvidia,emc_clk_rate = <300000000>;
+			nvidia,dc-flags = "dc_flag_en";
+			nvidia,emc-clk-rate = <300000000>;
 			nvidia,cmu-enable = <1>;
 			dc-default-out {
 				nvidia,out-type = "hdmi";
@@ -351,7 +358,6 @@ Example
 				nvidia,out-max-pixclk = <297000>;
 				nvidia,out-align = "msb";
 				nvidia,out-order = "rtob"; /*red to blue*/
-				nvidia,out-hotplug-gpio = <&gpio 111 1>;
 			};
 			framebuffer-data {
 				nvidia,fb-bpp = <32>; /* bits per pixel */
diff --git a/Documentation/devicetree/bindings/video/nvidia,tegra114-dsi.txt b/Documentation/devicetree/bindings/video/nvidia,tegra114-dsi.txt
index 8f1881e25d73..fc16f67c0fd5 100644
--- a/Documentation/devicetree/bindings/video/nvidia,tegra114-dsi.txt
+++ b/Documentation/devicetree/bindings/video/nvidia,tegra114-dsi.txt
@@ -9,7 +9,21 @@ NVIDIA TEGRA114 Display Serial Interface
  - name: dsi
  - compatible: Should contain "nvidia,tegra114-dsi".
  - reg: Physical base address and length of the controller's registers.
- - nvidia,panel: phandle for panel device data.
+ - nvidia,dsi-controller-vs: DSI version. Write 0, 1 for DSI_VS_0 and DSI_VS_1, respectively. For TEGRA114,
+   it should be 1.
+
+ - Child node represents dsi panel node.
+
+1.A) dsi panel node:
+ dsi panel node must be contained in dsi parent node. This node represents dsi panel node.
+
+ Required properties
+ - name: Can be arbitrary.
+ - compatible: Can be arbitrary. One panel has its own unique compatible.
+ - nvidia,dsi-panel-rst-gpio: panel reset gpio.
+ - nvidia,dsi-panel-bl-en-gpio: backlight enabling gpio.
+ - nvidia,dsi-panel-bl-pwm-gpio: gpio for backlight pwm signal.
+ - nvidia,dsi-te-gpio: gpio for panel TE(Tearing Effect) signal.
  - nvidia,dsi-n-data-lanes: Number of DSI lanes in use. Should be one of 2, 3, 4, and 8
  - nvidia,dsi-video-burst-mode: Video mode. Write 0, 1, 2, 3, 4, 5 and 6 for TEGRA_DSI_VIDEO_NONE_BURST_MODE,
    TEGRA_DSI_VIDEO_NONE_BURST_MODE_WITH_SYNC_END, TEGRA_DSI_VIDEO_BURST_MODE_LOWEST_SPEED,
@@ -30,8 +44,6 @@ NVIDIA TEGRA114 Display Serial Interface
  - nvidia,dsi-video-clock-mode: Control for the hs clock lane. Continuous means hs clock on all the time.
    Txonly means only hs clock active during hs transmissions. Write 0, 1 for TEGRA_DSI_VIDEO_CLOCK_CONTINUOUS,
    and TEGRA_DSI_VIDEO_CLOCK_TX_ONLY, respectively.
- - nvidia,dsi-controller-vs: DSI version. Write 0, 1 for DSI_VS_0 and DSI_VS_1, respectively. For TEGRA114,
-   it should be 1.
  - nvidia,dsi-init-cmd: panel required init command sequence.
  - nvidia,dsi-n-init-cmd: command counts of init command sequence, including delay set.
  - nvidia,dsi-suspend-cmd: panel required suspend command sequence.
@@ -66,57 +78,41 @@ Example
 			reg = <0x54300000 0x00040000>,
 			      <0x54400000 0x00040000>;
 			status = "okay";
-			nvidia,panel = <&panel>;
-			nvidia,dsi-instance = <0>; /* 0 or 1 */
-			nvidia,dsi-n-data-lanes = <4>;
-			nvidia,dsi-pixel-format = <3>;
-			nvidia,dsi-refresh-rate = <60>;
-			nvidia,dsi-video-data-type = <0>;
-			nvidia,dsi-video-clock-mode = <0>;
-			nvidia,dsi-video-burst-mode = <1>;
 			nvidia,dsi-controller-vs = <1>;
-			nvidia,dsi-virtual-channel = <0>;
-			nvidia,dsi-panel-reset = <1>;
-			nvidia,dsi-power-saving-suspend = <1>;
-			nvidia,dsi-init-cmd = <0x0 0x29 0x6 0x0 0x0 0xe0 0x43 0x0 0x80 0x0 0x0 0x0 0x0>,
-						<0x0 0x29 0x6 0x0 0x0 0xb5 0x34 0x20 0x40 0x0 0x20 0x0 0x0>,
-						<0x0 0x29 0x6 0x0 0x0 0xb6 0x04 0x74 0x0f 0x16 0x13 0x0 0x0>,
-						<0x0 0x29 0x3 0x0 0x0 0xc0 0x01 0x08 0x0 0x0>,
-						<0x0 0x23 0xc1 0x0 0x0>,
-						<0x0 0x29 0xa 0x0 0x0 0xc3 0x0 0x09 0x10 0x02 0x0 0x66 0x20 0x13 0x0 0x0 0x0>,
-						<0x0 0x29 0x6 0x0 0x0 0xc4 0x23 0x24 0x17 0x17 0x59 0x0 0x0>,
-						<0x0 0x29 0xa 0x0 0x0 0xd0 0x21 0x13 0x67 0x37 0x0c 0x06 0x62 0x23 0x03 0x0 0x0>,
-						<0x0 0x29 0xa 0x0 0x0 0xd1 0x32 0x13 0x66 0x37 0x02 0x06 0x62 0x23 0x03 0x0 0x0>,
-						<0x0 0x29 0xa 0x0 0x0 0xd2 0x41 0x14 0x56 0x37 0x0c 0x06 0x62 0x23 0x03 0x0 0x0>,
-						<0x0 0x29 0xa 0x0 0x0 0xd3 0x52 0x14 0x55 0x37 0x02 0x06 0x62 0x23 0x03 0x0 0x0>,
-						<0x0 0x29 0xa 0x0 0x0 0xd4 0x41 0x14 0x56 0x37 0x0c 0x06 0x62 0x23 0x03 0x0 0x0>,
-						<0x0 0x29 0xa 0x0 0x0 0xd5 0x52 0x14 0x55 0x37 0x02 0x06 0x62 0x23 0x03 0x0 0x0>,
-						<0x0 0x15 0x36 0x8 0x0>,
-						<0x0 0x23 0xf9 0x0 0x0>,
-						<0x0 0x23 0x70 0x0 0x0>,
-						<0x0 0x29 0x5 0x0 0x0 0x71 0x0 0x0 0x01 0x01 0x0 0x0>,
-						<0x0 0x29 0x3 0x0 0x0 0x72 0x01 0x0e 0x0 0x0>,
-						<0x0 0x29 0x4 0x0 0x0 0x73 0x34 0x52 0x0 0x0 0x0>,
-						<0x0 0x29 0x4 0x0 0x0 0x74 0x05 0x0 0x06 0x0 0x0>,
-						<0x0 0x29 0x4 0x0 0x0 0x75 0x03 0x0 0x07 0x0 0x0>,
-						<0x0 0x29 0x4 0x0 0x0 0x76 0x07 0x0 0x06 0x0 0x0>,
-						<0x0 0x29 0x9 0x0 0x0 0x77 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x0 0x0>,
-						<0x0 0x29 0x9 0x0 0x0 0x78 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x0 0x0>,
-						<0x0 0x29 0x9 0x0 0x0 0x79 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x0 0x0>,
-						<0x0 0x29 0x9 0x0 0x0 0x7a 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>,
-						<0x0 0x29 0x9 0x0 0x0 0x7b 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>,
-						<0x0 0x29 0x9 0x0 0x0 0x7c 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>,
-						<0x0 0x23 0xc2 0x2 0x0>,
-						<1 20>,
-						<0x0 0x23 0xc2 0x6 0x0>,
-						<1 20>,
-						<0x0 0x23 0xc2 0x4e 0x0>,
-						<1 100>,
-						<0x0 0x5 0x11 0x0 0x0>,
-						<1 20>,
-						<0x0 0x23 0xf9 0x80 0x0>,
-						<1 20>,
-						<0x0 0x5 0x29 0x0 0x0>;
-			nvidia,dsi-n-init-cmd = <39>;
+			panel-l-wxga-7 {
+				status = "okay";
+				compatible = "lg,wxga-7";
+				nvidia,dsi-instance = <0>;
+				nvidia,dsi-n-data-lanes = <4>;
+				nvidia,dsi-pixel-format = <3>;
+				nvidia,dsi-refresh-rate = <60>;
+				nvidia,dsi-video-data-type = <0>;
+				nvidia,dsi-video-clock-mode = <0>;
+				nvidia,dsi-video-burst-mode = <0>;
+				nvidia,dsi-virtual-channel = <0>;
+				nvidia,dsi-power-saving-suspend = <1>;
+				nvidia,dsi-phy-datzero = <270>;
+				nvidia,dsi-phy-hsprepare = <30>;
+				nvidia,dsi-phy-clkzero = <330>;
+				nvidia,dsi-phy-clkprepare = <27>;
+				nvidia,dsi-init-cmd = <0x0 0x15 0x01 0x0 0x0>,
+						      <1 20>,
+						      <0x0 0x15 0xae 0x0b 0x0>,
+						      <0x0 0x15 0xee 0xea 0x0>,
+						      <0x0 0x15 0xef 0x5f 0x0>,
+						      <0x0 0x15 0xf2 0x68 0x0>,
+						      <0x0 0x15 0xee 0x0 0x0>,
+						      <0x0 0x15 0xef 0x0 0x0>;
+				nvidia,dsi-n-init-cmd = <8>;
+				nvidia,dsi-suspend-cmd = <0x0 0x15 0x11 0x0 0x0>,
+							 <1 160>;
+				nvidia,dsi-n-suspend-cmd = <2>;
+				nvidia,dsi-late-resume-cmd = <0x0 0x15 0x10 0x0 0x0>,
+							     <1 120>;
+				nvidia,dsi-n-late-resume-cmd = <2>;
+				nvidia,dsi-early-suspend-cmd = <0x0 0x15 0x11 0x0 0x0>,
+							       <1 160>;
+				nvidia,dsi-n-early-suspend-cmd = <2>;
+			};
 		};
 	};
diff --git a/Documentation/devicetree/bindings/video/nvidia,tegra114-hdmi.txt b/Documentation/devicetree/bindings/video/nvidia,tegra114-hdmi.txt
index 03c320a4b1a4..83cfc2df95a0 100644
--- a/Documentation/devicetree/bindings/video/nvidia,tegra114-hdmi.txt
+++ b/Documentation/devicetree/bindings/video/nvidia,tegra114-hdmi.txt
@@ -19,10 +19,6 @@ NVIDIA TEGRA114 High Definition Multimedia Interface
    which does only set DDC_SDA and DDC_SCL pull downs to be active when hotplug
    is detected, otherwise keep them disabled.
 
- NOTE:
- - regulator names for supply voltage, PLL and hdmi 5V source should be avdd_hdmi, avdd_hdmi_pll,
-   vdd_hdmi_5v0, respectively.
-
  1.B) NVIDIA HDMI TMDS configurations
  This must be contained in hdmi parent node. This includes tmds configurations.
 
diff --git a/Documentation/devicetree/bindings/video/nvidia,tegra124-dc.txt b/Documentation/devicetree/bindings/video/nvidia,tegra124-dc.txt
index 59e9d19140de..e91b7c3f5998 100644
--- a/Documentation/devicetree/bindings/video/nvidia,tegra124-dc.txt
+++ b/Documentation/devicetree/bindings/video/nvidia,tegra124-dc.txt
@@ -17,6 +17,10 @@ NVIDIA Tegra124 Display Controller
  - nvidia,cmu-enable: Toggle switch for color management unit.
  - nvidia,low-v-win: If low_v_win is set, we can lower vdd_core when that windows
    is the only one active.
+ - avdd_hdmi-supply: phandle to the regulator device tree node for HDMI supply voltage,
+   HDMI_AVDD.
+ - avdd_hdmi_pll-supply: phandle to the regulator device tree node for HDMI pll supply.
+ - vdd_hdmi_5v0-supply: phandle to the regulator device tree node for HDMI 5V source.
 
  - Child nodes represent node of modes, output settings, framebuffer data,
    smart dimmer settings, color management unit settings, dsi output device settings.
@@ -144,6 +148,9 @@ Example
 			nvidia,dc-flags = "dc_flag_en";
 			nvidia,emc-clk-rate = <204000000>;
 			nvidia,cmu-enable = <1>;
+			avdd_hdmi-supply = <&palmas_ldoln>;
+			avdd_hdmi_pll-supply = <&palmas_ldo1>;
+			vdd_hdmi_5v0-supply = <&vdd_hdmi>;
 			dc-default-out {
 				nvidia,out-type = "dsi";
 				nvidia,out-width = <217>;
@@ -341,8 +348,8 @@ Example
 			reg = <0x54240000 0x00040000>;
 			interrupts = <0 74 0x04>;
 			status = "okay";
-			nvidia,dc_flags = "dc_flag_en";
-			nvidia,emc_clk_rate = <300000000>;
+			nvidia,dc-flags = "dc_flag_en";
+			nvidia,emc-clk-rate = <300000000>;
 			nvidia,cmu-enable = <1>;
 			dc-default-out {
 				nvidia,out-type = "hdmi";
@@ -351,7 +358,6 @@ Example
 				nvidia,out-max-pixclk = <297000>;
 				nvidia,out-align = "msb";
 				nvidia,out-order = "rtob"; /*red to blue*/
-				nvidia,out-hotplug-gpio = <&gpio 111 1>;
 			};
 			framebuffer-data {
 				nvidia,fb-bpp = <32>; /* bits per pixel */
diff --git a/Documentation/devicetree/bindings/video/nvidia,tegra124-dsi.txt b/Documentation/devicetree/bindings/video/nvidia,tegra124-dsi.txt
index 486062f1cae1..3b37ec66b16f 100644
--- a/Documentation/devicetree/bindings/video/nvidia,tegra124-dsi.txt
+++ b/Documentation/devicetree/bindings/video/nvidia,tegra124-dsi.txt
@@ -9,7 +9,21 @@ NVIDIA TEGRA124 Display Serial Interface
  - name: dsi
  - compatible: Should contain "nvidia,tegra124-dsi".
  - reg: Physical base address and length of the controller's registers.
- - nvidia,panel: phandle for panel device data.
+ - nvidia,dsi-controller-vs: DSI version. Write 0, 1 for DSI_VS_0 and DSI_VS_1, respectively. For TEGRA124,
+   it should be 1.
+
+ - Child node represents dsi panel node.
+
+1.A) dsi panel node:
+ dsi panel node must be contained in dsi parent node. This node represents dsi panel node.
+
+ Required properties
+ - name: Can be arbitrary.
+ - compatible: Can be arbitrary. One panel has its own unique compatible.
+ - nvidia,dsi-panel-rst-gpio: panel reset gpio.
+ - nvidia,dsi-panel-bl-en-gpio: backlight enabling gpio.
+ - nvidia,dsi-panel-bl-pwm-gpio: gpio for backlight pwm signal.
+ - nvidia,dsi-te-gpio: gpio for panel TE(Tearing Effect) signal.
  - nvidia,dsi-n-data-lanes: Number of DSI lanes in use. Should be one of 2, 3, 4, and 8
  - nvidia,dsi-video-burst-mode: Video mode. Write 0, 1, 2, 3, 4, 5 and 6 for TEGRA_DSI_VIDEO_NONE_BURST_MODE,
    TEGRA_DSI_VIDEO_NONE_BURST_MODE_WITH_SYNC_END, TEGRA_DSI_VIDEO_BURST_MODE_LOWEST_SPEED,
@@ -30,8 +44,6 @@ NVIDIA TEGRA124 Display Serial Interface
  - nvidia,dsi-video-clock-mode: Control for the hs clock lane. Continuous means hs clock on all the time.
    Txonly means only hs clock active during hs transmissions. Write 0, 1 for TEGRA_DSI_VIDEO_CLOCK_CONTINUOUS,
    and TEGRA_DSI_VIDEO_CLOCK_TX_ONLY, respectively.
- - nvidia,dsi-controller-vs: DSI version. Write 0, 1 for DSI_VS_0 and DSI_VS_1, respectively. For TEGRA124,
-   it should be 1.
  - nvidia,dsi-init-cmd: panel required init command sequence.
  - nvidia,dsi-n-init-cmd: command counts of init command sequence, including delay set.
  - nvidia,dsi-suspend-cmd: panel required suspend command sequence.
@@ -66,57 +78,41 @@ Example
 			reg = <0x54300000 0x00040000>,
 			      <0x54400000 0x00040000>;
 			status = "okay";
-			nvidia,panel = <&panel>;
-			nvidia,dsi-instance = <0>; /* 0 or 1 */
-			nvidia,dsi-n-data-lanes = <4>;
-			nvidia,dsi-pixel-format = <3>;
-			nvidia,dsi-refresh-rate = <60>;
-			nvidia,dsi-video-data-type = <0>;
-			nvidia,dsi-video-clock-mode = <0>;
-			nvidia,dsi-video-burst-mode = <1>;
 			nvidia,dsi-controller-vs = <1>;
-			nvidia,dsi-virtual-channel = <0>;
-			nvidia,dsi-panel-reset = <1>;
-			nvidia,dsi-power-saving-suspend = <1>;
-			nvidia,dsi-init-cmd = <0x0 0x29 0x6 0x0 0x0 0xe0 0x43 0x0 0x80 0x0 0x0 0x0 0x0>,
-						<0x0 0x29 0x6 0x0 0x0 0xb5 0x34 0x20 0x40 0x0 0x20 0x0 0x0>,
-						<0x0 0x29 0x6 0x0 0x0 0xb6 0x04 0x74 0x0f 0x16 0x13 0x0 0x0>,
-						<0x0 0x29 0x3 0x0 0x0 0xc0 0x01 0x08 0x0 0x0>,
-						<0x0 0x23 0xc1 0x0 0x0>,
-						<0x0 0x29 0xa 0x0 0x0 0xc3 0x0 0x09 0x10 0x02 0x0 0x66 0x20 0x13 0x0 0x0 0x0>,
-						<0x0 0x29 0x6 0x0 0x0 0xc4 0x23 0x24 0x17 0x17 0x59 0x0 0x0>,
-						<0x0 0x29 0xa 0x0 0x0 0xd0 0x21 0x13 0x67 0x37 0x0c 0x06 0x62 0x23 0x03 0x0 0x0>,
-						<0x0 0x29 0xa 0x0 0x0 0xd1 0x32 0x13 0x66 0x37 0x02 0x06 0x62 0x23 0x03 0x0 0x0>,
-						<0x0 0x29 0xa 0x0 0x0 0xd2 0x41 0x14 0x56 0x37 0x0c 0x06 0x62 0x23 0x03 0x0 0x0>,
-						<0x0 0x29 0xa 0x0 0x0 0xd3 0x52 0x14 0x55 0x37 0x02 0x06 0x62 0x23 0x03 0x0 0x0>,
-						<0x0 0x29 0xa 0x0 0x0 0xd4 0x41 0x14 0x56 0x37 0x0c 0x06 0x62 0x23 0x03 0x0 0x0>,
-						<0x0 0x29 0xa 0x0 0x0 0xd5 0x52 0x14 0x55 0x37 0x02 0x06 0x62 0x23 0x03 0x0 0x0>,
-						<0x0 0x15 0x36 0x8 0x0>,
-						<0x0 0x23 0xf9 0x0 0x0>,
-						<0x0 0x23 0x70 0x0 0x0>,
-						<0x0 0x29 0x5 0x0 0x0 0x71 0x0 0x0 0x01 0x01 0x0 0x0>,
-						<0x0 0x29 0x3 0x0 0x0 0x72 0x01 0x0e 0x0 0x0>,
-						<0x0 0x29 0x4 0x0 0x0 0x73 0x34 0x52 0x0 0x0 0x0>,
-						<0x0 0x29 0x4 0x0 0x0 0x74 0x05 0x0 0x06 0x0 0x0>,
-						<0x0 0x29 0x4 0x0 0x0 0x75 0x03 0x0 0x07 0x0 0x0>,
-						<0x0 0x29 0x4 0x0 0x0 0x76 0x07 0x0 0x06 0x0 0x0>,
-						<0x0 0x29 0x9 0x0 0x0 0x77 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x3f 0x0 0x0>,
-						<0x0 0x29 0x9 0x0 0x0 0x78 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x0 0x0>,
-						<0x0 0x29 0x9 0x0 0x0 0x79 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x40 0x0 0x0>,
-						<0x0 0x29 0x9 0x0 0x0 0x7a 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>,
-						<0x0 0x29 0x9 0x0 0x0 0x7b 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>,
-						<0x0 0x29 0x9 0x0 0x0 0x7c 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>,
-						<0x0 0x23 0xc2 0x2 0x0>,
-						<1 20>,
-						<0x0 0x23 0xc2 0x6 0x0>,
-						<1 20>,
-						<0x0 0x23 0xc2 0x4e 0x0>,
-						<1 100>,
-						<0x0 0x5 0x11 0x0 0x0>,
-						<1 20>,
-						<0x0 0x23 0xf9 0x80 0x0>,
-						<1 20>,
-						<0x0 0x5 0x29 0x0 0x0>;
-			nvidia,dsi-n-init-cmd = <39>;
+			panel-l-wxga-7 {
+				status = "okay";
+				compatible = "lg,wxga-7";
+				nvidia,dsi-instance = <0>;
+				nvidia,dsi-n-data-lanes = <4>;
+				nvidia,dsi-pixel-format = <3>;
+				nvidia,dsi-refresh-rate = <60>;
+				nvidia,dsi-video-data-type = <0>;
+				nvidia,dsi-video-clock-mode = <0>;
+				nvidia,dsi-video-burst-mode = <0>;
+				nvidia,dsi-virtual-channel = <0>;
+				nvidia,dsi-power-saving-suspend = <1>;
+				nvidia,dsi-phy-datzero = <270>;
+				nvidia,dsi-phy-hsprepare = <30>;
+				nvidia,dsi-phy-clkzero = <330>;
+				nvidia,dsi-phy-clkprepare = <27>;
+				nvidia,dsi-init-cmd = <0x0 0x15 0x01 0x0 0x0>,
+						      <1 20>,
+						      <0x0 0x15 0xae 0x0b 0x0>,
+						      <0x0 0x15 0xee 0xea 0x0>,
+						      <0x0 0x15 0xef 0x5f 0x0>,
+						      <0x0 0x15 0xf2 0x68 0x0>,
+						      <0x0 0x15 0xee 0x0 0x0>,
+						      <0x0 0x15 0xef 0x0 0x0>;
+				nvidia,dsi-n-init-cmd = <8>;
+				nvidia,dsi-suspend-cmd = <0x0 0x15 0x11 0x0 0x0>,
+							 <1 160>;
+				nvidia,dsi-n-suspend-cmd = <2>;
+				nvidia,dsi-late-resume-cmd = <0x0 0x15 0x10 0x0 0x0>,
+							     <1 120>;
+				nvidia,dsi-n-late-resume-cmd = <2>;
+				nvidia,dsi-early-suspend-cmd = <0x0 0x15 0x11 0x0 0x0>,
+							       <1 160>;
+				nvidia,dsi-n-early-suspend-cmd = <2>;
+			};
 		};
 	};
diff --git a/Documentation/devicetree/bindings/video/nvidia,tegra124-hdmi.txt b/Documentation/devicetree/bindings/video/nvidia,tegra124-hdmi.txt
index b038efd5eee7..9a0ccc2f5e6f 100644
--- a/Documentation/devicetree/bindings/video/nvidia,tegra124-hdmi.txt
+++ b/Documentation/devicetree/bindings/video/nvidia,tegra124-hdmi.txt
@@ -19,10 +19,6 @@ NVIDIA TEGRA124 High Definition Multimedia Interface
    which does only set DDC_SDA and DDC_SCL pull downs to be active when hotplug
    is detected, otherwise keep them disabled.
 
- NOTE:
- - regulator names for supply voltage, PLL and hdmi 5V source should be avdd_hdmi, avdd_hdmi_pll,
-   vdd_hdmi_5v0, respectively.
-
  1.B) NVIDIA HDMI TMDS configurations
  This must be contained in hdmi parent node. This includes tmds configurations.