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author | Zhao Qiang <B45475@freescale.com> | 2014-04-01 17:10:50 +0800 |
---|---|---|
committer | Nitin Garg <nitin.garg@freescale.com> | 2015-04-14 14:01:29 -0500 |
commit | a066e0323aa49c4cadd8ba003c29d82926489377 (patch) | |
tree | 5d274c9a9c1ef5971f6bd0c01ed0af00c2b70e85 /Documentation | |
parent | 074c956e20ed09302bd09a9943f090c10e79e388 (diff) |
spi: add "spi-lsb-first" to devicetree
add optional property devicetree for SPI slave nodes
into devicetree so that LSB mode can be enabled by devicetree.
Signed-off-by: Zhao Qiang <B45475@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit cd6339e6ced387ad67b5551dd2931cfd7e8b970b)
(cherry picked from commit 09623c20b3e6b11a914343d4b0f15b63e683f0d8)
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/spi/spi-bus.txt | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/spi/spi-bus.txt b/Documentation/devicetree/bindings/spi/spi-bus.txt index e5a4d1b4acfe..22d57404fdc3 100644 --- a/Documentation/devicetree/bindings/spi/spi-bus.txt +++ b/Documentation/devicetree/bindings/spi/spi-bus.txt @@ -55,6 +55,8 @@ contain the following properties. chip select active high - spi-3wire - (optional) Empty property indicating device requires 3-wire mode. +- spi-lsb-first - (optional) Empty property indicating device requires + LSB first mode. - spi-tx-bus-width - (optional) The bus width(number of data wires) that used for MOSI. Defaults to 1 if not present. - spi-rx-bus-width - (optional) The bus width(number of data wires) that |