diff options
author | Franck LENORMAND <franck.lenormand@nxp.com> | 2018-07-09 17:17:22 +0200 |
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committer | Jason Liu <jason.hui.liu@nxp.com> | 2018-10-29 11:10:38 +0800 |
commit | f1972741e52d6ac0bc100f86e80d4c67feead8fc (patch) | |
tree | 82653a429fbd5d2ff6ce6f8bb5e098c652150964 /Documentation | |
parent | fd7941ef67c58ab2663940b431d410b34ee7c9c9 (diff) |
MLK-18082: crypto: caam: Doc replace tab with spaces
Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/crypto/fsl-sec4.txt | 352 |
1 files changed, 176 insertions, 176 deletions
diff --git a/Documentation/devicetree/bindings/crypto/fsl-sec4.txt b/Documentation/devicetree/bindings/crypto/fsl-sec4.txt index 138e93dd9b84..90697746b363 100644 --- a/Documentation/devicetree/bindings/crypto/fsl-sec4.txt +++ b/Documentation/devicetree/bindings/crypto/fsl-sec4.txt @@ -126,38 +126,38 @@ EXAMPLE iMX6QDL/SX requires four clocks - crypto@300000 { - compatible = "fsl,sec-v4.0"; - fsl,sec-era = <2>; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x300000 0x10000>; - ranges = <0 0x300000 0x10000>; - interrupt-parent = <&mpic>; - interrupts = <92 2>; - clocks = <&clks IMX6QDL_CLK_CAAM_MEM>, - <&clks IMX6QDL_CLK_CAAM_ACLK>, - <&clks IMX6QDL_CLK_CAAM_IPG>, - <&clks IMX6QDL_CLK_EIM_SLOW>; - clock-names = "mem", "aclk", "ipg", "emi_slow"; - }; + crypto@300000 { + compatible = "fsl,sec-v4.0"; + fsl,sec-era = <2>; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x300000 0x10000>; + ranges = <0 0x300000 0x10000>; + interrupt-parent = <&mpic>; + interrupts = <92 2>; + clocks = <&clks IMX6QDL_CLK_CAAM_MEM>, + <&clks IMX6QDL_CLK_CAAM_ACLK>, + <&clks IMX6QDL_CLK_CAAM_IPG>, + <&clks IMX6QDL_CLK_EIM_SLOW>; + clock-names = "mem", "aclk", "ipg", "emi_slow"; + }; iMX6UL does only require three clocks - crypto: caam@2140000 { - compatible = "fsl,sec-v4.0"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x2140000 0x3c000>; - ranges = <0 0x2140000 0x3c000>; - interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; - - clocks = <&clks IMX6UL_CLK_CAAM_MEM>, - <&clks IMX6UL_CLK_CAAM_ACLK>, - <&clks IMX6UL_CLK_CAAM_IPG>; - clock-names = "mem", "aclk", "ipg"; - }; + crypto: caam@2140000 { + compatible = "fsl,sec-v4.0"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x2140000 0x3c000>; + ranges = <0 0x2140000 0x3c000>; + interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; + + clocks = <&clks IMX6UL_CLK_CAAM_MEM>, + <&clks IMX6UL_CLK_CAAM_ACLK>, + <&clks IMX6UL_CLK_CAAM_IPG>; + clock-names = "mem", "aclk", "ipg"; + }; ===================================================================== SEC 4 Page 0 @@ -196,14 +196,14 @@ PROPERTIES Definition: Must include "disabled". EXAMPLE - sec_ctrl: ctrl@0 { - /* CAAM Page 0 only accessible */ - /* by secure world */ - compatible = "fsl,sec-v4.0-ctrl"; - reg = <0x2100000 0x1000>; - secure-status = "okay"; - status = "disabled"; - }; + sec_ctrl: ctrl@0 { + /* CAAM Page 0 only accessible */ + /* by secure world */ + compatible = "fsl,sec-v4.0-ctrl"; + reg = <0x2100000 0x1000>; + secure-status = "okay"; + status = "disabled"; + }; ===================================================================== Job Ring (JR) Node @@ -253,13 +253,13 @@ Job Ring (JR) Node is being mapped. EXAMPLE - jr@1000 { - compatible = "fsl,sec-v4.0-job-ring"; - reg = <0x1000 0x1000>; - fsl,liodn = <0x081>; - interrupt-parent = <&mpic>; - interrupts = <88 2>; - }; + jr@1000 { + compatible = "fsl,sec-v4.0-job-ring"; + reg = <0x1000 0x1000>; + fsl,liodn = <0x081>; + interrupt-parent = <&mpic>; + interrupts = <88 2>; + }; ===================================================================== Secure memory (SM) Node @@ -327,13 +327,13 @@ Run Time Integrity Check (RTIC) Node length. EXAMPLE - rtic@6000 { - compatible = "fsl,sec-v4.0-rtic"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x6000 0x100>; - ranges = <0x0 0x6100 0xe00>; - }; + rtic@6000 { + compatible = "fsl,sec-v4.0-rtic"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x6000 0x100>; + ranges = <0x0 0x6100 0xe00>; + }; ===================================================================== Run Time Integrity Check (RTIC) Memory Node @@ -377,12 +377,12 @@ Run Time Integrity Check (RTIC) Memory Node property is normally set by boot firmware. EXAMPLE - rtic-a@0 { - compatible = "fsl,sec-v4.0-rtic-memory"; - reg = <0x00 0x20 0x100 0x80>; - fsl,liodn = <0x03c>; - fsl,rtic-region = <0x12345678 0x12345678 0x12345678>; - }; + rtic-a@0 { + compatible = "fsl,sec-v4.0-rtic-memory"; + reg = <0x00 0x20 0x100 0x80>; + fsl,liodn = <0x03c>; + fsl,rtic-region = <0x12345678 0x12345678 0x12345678>; + }; ===================================================================== Secure Non-Volatile Storage (SNVS) Node @@ -442,13 +442,13 @@ Secure Non-Volatile Storage (SNVS) Node is being mapped. EXAMPLE - sec_mon@314000 { - compatible = "fsl,sec-v4.0-mon", "syscon"; - reg = <0x314000 0x1000>; - ranges = <0 0x314000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <93 2>; - }; + sec_mon@314000 { + compatible = "fsl,sec-v4.0-mon", "syscon"; + reg = <0x314000 0x1000>; + ranges = <0 0x314000 0x1000>; + interrupt-parent = <&mpic>; + interrupts = <93 2>; + }; ===================================================================== CAAM SNVS Node @@ -537,37 +537,37 @@ Secure Non-Volatile Storage (SNVS) Low Power (LP) RTC Node Usage: required Value type: <prop_encoded-array> Definition: Specifies the interrupts generated by this - device. The value of the interrupts property - consists of one interrupt specifier. The format - of the specifier is defined by the binding document - describing the node's interrupt parent. + device. The value of the interrupts property + consists of one interrupt specifier. The format + of the specifier is defined by the binding document + describing the node's interrupt parent. - regmap - Usage: required - Value type: <phandle> - Definition: this is phandle to the register map node. + Usage: required + Value type: <phandle> + Definition: this is phandle to the register map node. - offset - Usage: option - value type: <u32> - Definition: LP register offset. default it is 0x34. + Usage: option + value type: <u32> + Definition: LP register offset. default it is 0x34. - clocks Usage: optional Value type: <prop-encoded-array> Definition: A standard property. Specifies the source clock for - snvs register access. If i.MX clk driver defines the clock node, - it needs user to specify the clocks in device tree for all modules - with snvs LP/HP registers access. The modules involved snvs LP/HP - registers access are snvs-power key, snvs-rtc, and caam. + snvs register access. If i.MX clk driver defines the clock node, + it needs user to specify the clocks in device tree for all modules + with snvs LP/HP registers access. The modules involved snvs LP/HP + registers access are snvs-power key, snvs-rtc, and caam. EXAMPLE - sec_mon_rtc_lp@1 { - compatible = "fsl,sec-v4.0-mon-rtc-lp"; - interrupts = <93 2>; - regmap = <&snvs>; - offset = <0x34>; - }; + sec_mon_rtc_lp@1 { + compatible = "fsl,sec-v4.0-mon-rtc-lp"; + interrupts = <93 2>; + regmap = <&snvs>; + offset = <0x34>; + }; ===================================================================== System ON/OFF key driver @@ -602,103 +602,103 @@ System ON/OFF key driver Definition: this is phandle to the register map node. EXAMPLE: - snvs-pwrkey@0x020cc000 { - compatible = "fsl,sec-v4.0-pwrkey"; - regmap = <&snvs>; - interrupts = <0 4 0x4> - linux,keycode = <116>; /* KEY_POWER */ - wakeup-source; - }; + snvs-pwrkey@0x020cc000 { + compatible = "fsl,sec-v4.0-pwrkey"; + regmap = <&snvs>; + interrupts = <0 4 0x4> + linux,keycode = <116>; /* KEY_POWER */ + wakeup-source; + }; ===================================================================== FULL EXAMPLE - crypto: crypto@300000 { - compatible = "fsl,sec-v4.0"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x300000 0x10000>; - ranges = <0 0x300000 0x10000>; - interrupt-parent = <&mpic>; - interrupts = <92 2>; - - sec_jr0: jr@1000 { - compatible = "fsl,sec-v4.0-job-ring"; - reg = <0x1000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <88 2>; - }; - - sec_jr1: jr@2000 { - compatible = "fsl,sec-v4.0-job-ring"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <89 2>; - }; - - sec_jr2: jr@3000 { - compatible = "fsl,sec-v4.0-job-ring"; - reg = <0x3000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <90 2>; - }; - - sec_jr3: jr@4000 { - compatible = "fsl,sec-v4.0-job-ring"; - reg = <0x4000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <91 2>; - }; - - rtic@6000 { - compatible = "fsl,sec-v4.0-rtic"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x6000 0x100>; - ranges = <0x0 0x6100 0xe00>; - - rtic_a: rtic-a@0 { - compatible = "fsl,sec-v4.0-rtic-memory"; - reg = <0x00 0x20 0x100 0x80>; - }; - - rtic_b: rtic-b@20 { - compatible = "fsl,sec-v4.0-rtic-memory"; - reg = <0x20 0x20 0x200 0x80>; - }; - - rtic_c: rtic-c@40 { - compatible = "fsl,sec-v4.0-rtic-memory"; - reg = <0x40 0x20 0x300 0x80>; - }; - - rtic_d: rtic-d@60 { - compatible = "fsl,sec-v4.0-rtic-memory"; - reg = <0x60 0x20 0x500 0x80>; - }; - }; - }; - - sec_mon: sec_mon@314000 { - compatible = "fsl,sec-v4.0-mon"; - reg = <0x314000 0x1000>; - ranges = <0 0x314000 0x1000>; - - sec_mon_rtc_lp@34 { - compatible = "fsl,sec-v4.0-mon-rtc-lp"; - regmap = <&sec_mon>; - offset = <0x34>; - interrupts = <93 2>; - }; - - snvs-pwrkey@0x020cc000 { - compatible = "fsl,sec-v4.0-pwrkey"; - regmap = <&sec_mon>; - interrupts = <0 4 0x4>; - linux,keycode = <116>; /* KEY_POWER */ - wakeup-source; - }; - }; + crypto: crypto@300000 { + compatible = "fsl,sec-v4.0"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x300000 0x10000>; + ranges = <0 0x300000 0x10000>; + interrupt-parent = <&mpic>; + interrupts = <92 2>; + + sec_jr0: jr@1000 { + compatible = "fsl,sec-v4.0-job-ring"; + reg = <0x1000 0x1000>; + interrupt-parent = <&mpic>; + interrupts = <88 2>; + }; + + sec_jr1: jr@2000 { + compatible = "fsl,sec-v4.0-job-ring"; + reg = <0x2000 0x1000>; + interrupt-parent = <&mpic>; + interrupts = <89 2>; + }; + + sec_jr2: jr@3000 { + compatible = "fsl,sec-v4.0-job-ring"; + reg = <0x3000 0x1000>; + interrupt-parent = <&mpic>; + interrupts = <90 2>; + }; + + sec_jr3: jr@4000 { + compatible = "fsl,sec-v4.0-job-ring"; + reg = <0x4000 0x1000>; + interrupt-parent = <&mpic>; + interrupts = <91 2>; + }; + + rtic@6000 { + compatible = "fsl,sec-v4.0-rtic"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x6000 0x100>; + ranges = <0x0 0x6100 0xe00>; + + rtic_a: rtic-a@0 { + compatible = "fsl,sec-v4.0-rtic-memory"; + reg = <0x00 0x20 0x100 0x80>; + }; + + rtic_b: rtic-b@20 { + compatible = "fsl,sec-v4.0-rtic-memory"; + reg = <0x20 0x20 0x200 0x80>; + }; + + rtic_c: rtic-c@40 { + compatible = "fsl,sec-v4.0-rtic-memory"; + reg = <0x40 0x20 0x300 0x80>; + }; + + rtic_d: rtic-d@60 { + compatible = "fsl,sec-v4.0-rtic-memory"; + reg = <0x60 0x20 0x500 0x80>; + }; + }; + }; + + sec_mon: sec_mon@314000 { + compatible = "fsl,sec-v4.0-mon"; + reg = <0x314000 0x1000>; + ranges = <0 0x314000 0x1000>; + + sec_mon_rtc_lp@34 { + compatible = "fsl,sec-v4.0-mon-rtc-lp"; + regmap = <&sec_mon>; + offset = <0x34>; + interrupts = <93 2>; + }; + + snvs-pwrkey@0x020cc000 { + compatible = "fsl,sec-v4.0-pwrkey"; + regmap = <&sec_mon>; + interrupts = <0 4 0x4>; + linux,keycode = <116>; /* KEY_POWER */ + wakeup-source; + }; + }; caam_snvs: caam-snvs@30370000 { compatible = "fsl,imx6q-caam-snvs"; |