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authorShane Huang <shane.huang@amd.com>2014-01-22 14:05:46 -0800
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2014-02-06 11:22:20 -0800
commit5a81a0ae34d50bf9c15d9f4b233f81888a000650 (patch)
treeb1b35132950cc20f2a774266d48e6ad1864da020 /Documentation
parent983565dcd368782495f3988e78888289e32f46b3 (diff)
i2c: piix4: Add support for AMD ML and CZ SMBus changes
commit 032f708bc4f6da868ec49dac48ddf3670d8035d3 upstream. The locations of SMBus register base address and enablement bit are changed from AMD ML, which need this patch to be supported. Signed-off-by: Shane Huang <shane.huang@amd.com> Reviewed-by: Jean Delvare <khali@linux-fr.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/i2c/busses/i2c-piix42
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/i2c/busses/i2c-piix4 b/Documentation/i2c/busses/i2c-piix4
index c097e0f020fe..aa959fd22450 100644
--- a/Documentation/i2c/busses/i2c-piix4
+++ b/Documentation/i2c/busses/i2c-piix4
@@ -13,7 +13,7 @@ Supported adapters:
* AMD SP5100 (SB700 derivative found on some server mainboards)
Datasheet: Publicly available at the AMD website
http://support.amd.com/us/Embedded_TechDocs/44413.pdf
- * AMD Hudson-2, CZ
+ * AMD Hudson-2, ML, CZ
Datasheet: Not publicly available
* Standard Microsystems (SMSC) SLC90E66 (Victory66) southbridge
Datasheet: Publicly available at the SMSC website http://www.smsc.com